HD404019R Datasheet, PDF (23/65 Pages) Renesas Technology Corp – CMOS 4-bit single-chip microcomputers

HD404019R Series
Serial Interrupt Request Flag (IFS: $003, Bit 0): The serial interrupt request flag will be set when the
octal counter counts eight transmit clock signals, or when data transfer is discontinued by resetting the
octal counter. Refer to table 8.
Table 8 Serial Interrupt Request Flag
IFS
Interrupt Request
0
No
1
Yes
Serial Interrupt Mask (IMS: $003, Bit 1): The serial interrupt mask masks the interrupt request. Refer to
table 9.
Table 9 Serial Interrupt Mask
IMS
Interrupt Request
0
Enabled
1
Disabled (masked)
Selection and Change of the Operation Mode: Table 10 shows the serial interface operation modes
which are determined by a combination of the value in the port mode register and in the serial mode
register.
Initialize the serial interface by a write signal to the serial mode register when the operation mode has
changed.
Table 10 Serial Interface Operation Mode
SMR3
1
PMR1
0
1
PMR0
0
1
0
1
Serial Interface Operating Mode
Clock continuous output mode
Transmit mode
Receive mode
Transmit/receive mode
Operating State of Serial Interface: The serial interface has three operating states: the STS waiting state,
transmit clock wait state, and transfer state, as shown in figure 11.
The STS waiting state is the initialization state of the serial interface. The serial interface enters this state in
one of two ways: either by the operation mode changing through a change in the data in the port mode
register, or by data being written into the serial mode register. In this state, the serial interface does not
operate even if the transmit clock is applied. If the STS instruction is executed, the serial interface shifts to
the transmit clock wait state.
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