M37160M8 Datasheet, PDF (21/131 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

M37160M8/MA/MF-XXXSP/FP,M37160EFSP/FP
Interrupt Control Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt control register 1 (ICON1) [Address 00FE16]
B
Name
Functions
After reset R W
0 Timer 1 interrupt
enable bit (TM1E)
0 : Interrupt disabled
1 : Interrupt enabled
0
RW
1 Timer 2 interrupt
enable bit (TM2E)
2 Timer 3 interrupt
enable bit (TM3E)
3 Timer 4 interrupt
enable bit (TM4E)
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0
RW
0
RW
0
RW
4 ^{OSD interrupt enable bit 0 : Interrupt disabled}
(OSDE)
1 : Interrupt enabled
0 ^RW
5 ^{VSYNC interrupt enable}
bit (VSCE)
6 INT3 external interrupt
enable bit (IN3E)
0 : Interrupt disabled
1 : Interrupt enabled
0 : Interrupt disabled
1 : Interrupt enabled
0
RW
0
RW
7 Nothing is assigned. This bit is a write disable
bit. When this bit is read out, the value is “0.”
0
R—
Fig. 8.3.4 Interrupt Control Register 1
Interrupt Control Register 2
b7 b6 b5 b4 b3 b2 b1 b0
0
Interrupt control register 2 (ICON2) [Address 00FF16]
B
Name
0 INT1 external interrupt
enable bit (IN1E)
1 Fix this bit to “0.”
Functions
After reset _{R W}
0 : Interrupt disabled ₀
1 : Interrupt enabled
RW
0 RW
2 ^{Serial I/O interrupt}
enable bit (SIE)
0 : Interrupt disabled ₀
1 : Interrupt enabled
3 f(XIN)/4096 interrupt
enable bit (CKE)
0 : Interrupt disabled ₀
1 : Interrupt enabled
4 INT2 external interrupt 0 : Interrupt disabled 0
enable bit (IN2E)
1 : Interrupt enabled
5 Multi-master ^I2C-BUS 0 : Interrupt disabled ₀
interface interrupt enable _{1 : Interrupt enabled}
bit (IICE)
6
Timer 5 • 6 interrupt
enable bit (TM56E)
0 : Interrupt disabled 0
1 : Interrupt enabled
7 Timer 5 • 6 interrupt
0 : Timer 5
0
switch bit (TM56C)
1 : Timer 6
RW
RW
RW
RW
RW
RW
Fig. 8.3.5 Interrupt Control Register 2
Rev.1.01 2003.11.13 page 21 of 130