M37160M8 Datasheet, PDF (20/131 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

M37160M8/MA/MF-XXXSP/FP,M37160EFSP/FP
Interrupt Request Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt request register 1 (IREQ1) [Address 00FC16]
B
Name
Functions
0 _{Timer 1 interrupt request} 0 : No interrupt request issued
bit (TM1R)
1 : Interrupt request issued
1 Timer 2 interrupt request 0 : No interrupt request issued
bit (TM2R)
1 : Interrupt request issued
2 Timer 3 interrupt request 0 : No interrupt request issued
bit (TM3R)
1 : Interrupt request issued
3 Timer 4 interrupt request 0 : No interrupt request issued
bit (TM4R)
1 : Interrupt request issued
4 OSD interrupt
request bit (OSDR)
0 : No interrupt request issued
1 : Interrupt request issued
5 VSYNC interrupt request 0 : No interrupt request issued
bit (VSCR)
1 : Interrupt request issued
6 INT3 external interrupt
request bit (IN3R)
0 : No interrupt request issued
1 : Interrupt request issued
7 Nothing is assigned. This bit is a write disable bit.
When this bit is read out, the value is “0.”
✽: “0” can be set by software, but “1” cannot be set.
Afrer reset R W
0
R✽
0
R✽
0
R✽
0
R✽
0
R✽
0
R✽
0
R✽
0
R—
Fig. 8.3.2 Interrupt Request Register 1
Interrupt Request Register 2
b7 b6 b5 b4 b3 b2 b1 b0
0
0
Interrupt request register 2 (IREQ2) [Address 00FD16]
B
Name
0 INT1 external interrupt
request bit (IN1R)
1 Fix this bit to “0.”
Functions
After reset _{R W}
0 : No interrupt request issued
1 : Interrupt request issued
0 R✽
0 R✽
2 ^{Serial I/O interrupt}
request bit (SIR)
3 f(XIN)/4096 interrupt
request bit (CKR)
4 INT2 external interrupt
request bit (IN2R)
5 Multi-master I²C-BUS
interrupt request bit (IICR)
6 Timer 5 • 6 interrupt
request bit (TM56R)
7 Fix this bit to “0.”
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
0 R✽
0 R✽
0 R✽
0 R✽
0 R✽
0 RW
✽: “0” can be set by software, but “1” cannot be set.
Fig. 8.3.3 Interrupt Request Register 2
Rev.1.01 2003.11.13 page 20 of 130