M37160M8 Datasheet, PDF (111/131 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

M37160M8/MA/MF-XXXSP/FP,M37160EFSP/FP
Address 00D116
Horizontal Position Register
b7 b6 b5 b4 b3 b2 b1 b0
Horizontal position register (HP) [Address 00D116]
B
Name
Functions
After reset R W
0 Horizontal display start Horizontal display start position
to position control bits
4Tosc ✕ n
0 RW
6 (HP0 to HP6)
(n: setting value, Tosc: OSD oscillation cycle)
7 Nothing is assigned. This bit is a write disable bit.
When this bit is read out, the value is “0.”
0 R—
Note: The setting value synchronizes with the V SYNC.
Address 00D216, 00D316
Block Control register i
b7 b6 b5 b4 b3 b2 b1 b0
Block control register i (BCi) (i=1, 2) [Addresses 00D216 and 00D316]
B
Name
0, 1 Display mode
selection bits
(BCi0, BCi1)
(See note 4)
2, 3 Dot size selection
bits (BCi2, BCi3)
(See note 1)
4 Pre-divide ratio
selection bit (BCi4)
5 OUToutput control bit
(BCi5)
6 Vertical display start
position control bit
(BCi6)
7 Window top/bottom
boundary control bit
(BCi7)
Functions
After reset R W
b1 b0
0 0: Display OFF
Indeterminate _{R W}
0 1: OSD1 mode
1 0: OSD2 mode (Border OFF)
1 1: OSD2 mode (Border ON)
/CD OSD mode (Border OFF)
b4 b3 b2 Pre-divide Ratio Dot Size _{Indeterminate R W}
00
1Tc ✕ 1/2H
01
0 ₁₀
1Tc ✕ 1H
✕2
2Tc ✕ 2H
11
00
3Tc ✕ 3H
1Tc ✕ 1/2H ^{Indeterminate} R W
01
1 ₁₀
1Tc ✕ 1H
✕3
2Tc ✕ 2H
11
3Tc ✕ 3H
0: 2 value output control
1: 3 value output control
Indeterminate R W
(See note 3)
BC16: Block 1
BC26: Block 1
Indeterminate R W
BC17: Window top boundary
BC27: Window bottom boundary
Indeterminate R W
Notes 1:Tc is OSD clock cycle divided in pre-divide circuit.
2:H is HSYNC.
3: Refer to the corresponding figure 8.10.18.
4: Selection in OSD2 mode/CD OSD mode is performed in the bits 0 and 1
of color dot OSD control registration.
Rev.1.01 2003.11.13 page 111 of 130