M37160M8 Datasheet, PDF (19/131 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

M37160M8/MA/MF-XXXSP/FP,M37160EFSP/FP
(4) Serial I/O interrupt
This is an interrupt request from the clock synchronous serial I/O
function.
(5) f(XIN)/4096 interrupt
The f (XIN)/4096 interrupt occurs regularly with a f(XIN)/4096 pe-
riod. Set bit 0 of the PWM mode register 1 to “0.”
(6) Multi-master I²C-BUS interface interrupt
This is an interrupt request related to the multi-master I²C-BUS
interface.
(7) Timer 5 • 6 interrupt
An interrupt is generated by an overflow of timer 5 or 6. Their
priorities are same, and can be switched by software.
(8) BRK instruction interrupt
This software interrupt has the least significant priority. It does
not have a corresponding interrupt enable bit, and it is not af-
fected by the interrupt disable flag I (non-maskable).
Interrupt request bit
Interrupt enable bit
Interrupt disable flag I
BRK instruction
Reset
Fig. 8.3.1 Interrupt Control
Interrupt
request
Rev.1.01 2003.11.13 page 19 of 130