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HYB18L256169BF Datasheet, PDF (35/48 Pages) Qimonda AG – 256-Mbit Mobile-RAM
2.4.9.2 SELF REFRESH
#, +
#+ %
#3
2! 3
#! 3
7%
! ! 
"! " !
$O NgT#A RE
Figure 43 SELF REFRESH Entry Command
HY[B/E]18L256169BF-7.5
256-Mbit Mobile-RAM
Functional Description
The SELF REFRESH command can be used to retain
data in the Mobile-RAM, even if the rest of the system
is powered down. When in the self refresh mode, the
Mobile-RAM retains data without external clocking. The
SELF REFRESH command is initiated like an AUTO
REFRESH command except CKE is LOW. Input
signals except CKE are “Don’t Care” during SELF
REFRESH.
The procedure for exiting SELF REFRESH requires a
stable clock prior to CKE returning HIGH. Once CKE is
HIGH, NOP commands must be issued for tRC because
time is required for a completion of any internal refresh
in progress.
If during normal operation burst auto refresh or user
controlled refresh is used, add 8192 auto refresh cycles
just before self refresh entry and just after self refresh
exit.
#, +
T20
#+ %
#O MM AND 02 %
!DD RESS
./0
!!0 0RE!LL
$1
(IGH :
!2&
T2#
T2#
T32 % 8
./ 0
./ 0
./ 0
!2 &
./ 0
!#4
2"OA W!N
2O WN
3E LF2E FRE SH
3ELF2E FRES H
%NTRY #O MMAN D %X IT#O MM AND
%X ITFROM
!NY#O MM AND
3E LF2E FRESH ! UTO2E FRESH
2E COMM ENDED
Figure 44 Self Refresh Entry and Exit
$ ON gT#A RE
Table 13 Timing Parameters for AUTO REFRESH and SELF REFRESH
Parameter
Symbol
- 7.5
Units
min.
max.
ACTIVE to ACTIVE command period
tRC
67
–
ns
PRECHARGE command period
tRP
19
–
ns
Refresh period (8192 rows)
tREF
–
64
ms
Self refresh exit time
tSREX
1
–
tCK
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:
no. of clock cycles = specified delay / clock period; round up to next integer.
Notes
1)
1)
1)
1)
Data Sheet
35
Rev. 1.02, 2006-12
02032006-MP0M-7FQG