SA2400A Datasheet, PDF (9/34 Pages) NXP Semiconductors – Single chip transceiver for 2.45 GHz ISM band

Philips Semiconductors
Single chip transceiver for 2.45 GHz ISM band
Product data
SA2400A
8.1 RESET
Shuts down all blocks except the 3-wire digital section, and
programs internal registers to known default values that are
described in section 13. This ensures that the SA2400A transmitter,
receiver, synthesizer and other blocks enter a known state when
made active. The SA2400A enters the SLEEP state automatically
after the RESET state. Before entering either the TXRX or RXMGC
active states, the internal registers can be reprogrammed to change
their values from the default values. A power-up of the digital supply
also forces the SA2400A to the RESET mode.
8.2 SLEEP
All blocks (except the xtal osc) are OFF. The xtal osc can be
separately shut down. Note that the 3-wire bus will remain
operational in all modes as long as the digital supply is ON. The
SA2400A retains programmed values of all active modes when it
comes out of the sleep mode. This includes the synthesizer
operation. Programmed via 3-wire bus.
8.3 WAIT
The PLL is on. Receiver and the transmitter are both OFF. This
mode is useful for a quick turn-around to either TXRX or RXMGC
modes. Transition to or from this mode is done via the 3-wire bus.
8.4 RXMGC
Only the PLL and Receiver are operating. The AGC gain is manually
set by the value of a register field.
8.5 TXRX
In this mode the logic level on the TX/RX input pin determines the
operational mode: 1 = TRANSMIT, 0 = RECEIVE. This way, no
3-wire bus programming is necessary to switch between Tx and Tx,
resulting in faster switching. When entering the RECEIVE mode
(either via 3-wire programming to TXRX mode with TX/RX pin at
logic zero, or by a 1-to-0 transition of TX/RX pin when already in the
TXRX mode), the Receiver is set to maximum gain. An AGC cycle is
initiated by a 0-to-1 change on the AGC_RESET digital input pin. At
any time in the RECEIVE mode, the AGC can be forced to the
maximum gain setting by giving a 1 µs pulse on the AGC_RESET
input while the TX/RX input is held at logic 0.
8.6 FASTTXRXMGC
It is similar to the RXMGC mode, except that the manual AGC gain
programming can be done faster, as described in Section 14.5.
8.7 FCALIB
This mode needs to be programmed after power ON in order to
internally calibrate the cut-off frequency of the on-chip transmit and
receive active filters. Upon completion of the calibration, the IC will
automatically switch to Main Mode = SLEEP. This calibration takes a
maximum of 3 µs measured from the end of the programming
sequence. The result of this calibration can be read out from register
word 0x04.
8.8 DCALIB
If the analog Tx inputs are used, this mode needs to be programmed
at least once after power ON in order to reduce the transmitter
carrier leakage. This mode should be programmed after being in TX
mode for at least 5 µs. Upon completion of the calibration, the IC will
automatically switch to Main Mode = SLEEP. This calibration takes a
maximum of 20 µs measured from the end of the programming
sequence. The result of this calibration can be read out from register
0x07.
8.9 VCOCALIB
This mode needs to be programmed at least once after power ON in
order to calibrate the internal VCO. Upon completion of the
calibration, the IC will automatically switch to Main Mode = SLEEP.
This calibration takes a maximum of 2.2 ms from the end of the
programming sequence. After this calibration, the synthesizer must
be re-programmed by writing the register words 0x00 through 0x03.
The result of this calibration can be read out from register 0x08.
2002 Nov 04
9