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SA2400A Datasheet, PDF (6/34 Pages) NXP Semiconductors – Single chip transceiver for 2.45 GHz ISM band
Philips Semiconductors
Single chip transceiver for 2.45 GHz ISM band
Product data
SA2400A
6. FUNCTIONAL DESCRIPTION
The SA2400A transceiver is intended for operation in the 2.45 GHz
band, specifically for IEEE 802.11b 1 and 2 Mbits/s DSSS, and
5.5 and 11 Mbits/s CCK standards. Throughout this document, the
operating RF frequency refers to the ISM band between 2.4 GHz
and 2.5 GHz.
6.1 RF VCO
The local oscillator is common to both the transmitter and the
receiver. The RF VCO is a differential 4.8 GHz oscillator with the
frequency determining components internal to the IC. The VCO is
connected internally to a frequency divider and a quadrature
generator circuit which produces the LO for the IQ up- and
downmixer. The divider output is also internally connected to the
synthesizer, which can be programmed in order to produce steps of
0.5 MHz for the desired LO frequency.
At the time of power-up, the VCO must be calibrated by invoking the
VCOCALIB mode by means of the three-wire bus. This operation
will select an appropriate frequency band in the VCO, thus
compensating for process tolerances. The calibration takes up to
2.2 ms, after which the IC automatically enters the SLEEP mode.
The synthesizer registers 0x00 through 0x03 must be
re-programmed after completing the VCOCALIB.
The 2.45 GHz LO can also be injected externally.
6.2 RF Low Noise Amplifier
The RF LNA has differential inputs and an external balun is needed
in the case of single-ended operation. It has two gain states which
are controlled internally by the on-chip automatic gain control, or
manually via the 3-wire bus.
6.3 Downconversion mixers
The RF signal is converted down directly to baseband by quadrature
image-reject mixers.
6.4 Receiver low-pass filter, baseband amplifiers
The I and Q low-pass filters are fully integrated Chebychev active
filters. The I and Q pass band extends from DC to a –3 dB corner at
7 MHz.
Additional adjustable gain is provided in baseband amplifiers to
achieve a total adjustable gain range of 79 dB. The Rx output is
provided in the form of differential I and Q signals, which must be
DC coupled to the ADC inputs on a base band IC.
6.5 DC cancellation
The Rx chain also integrates a high-pass filter (DC notch) for
cancellation of the DC offset inherent to zero-IF operation. The
high-pass filter has a programmable lower 3 dB cutoff frequency of
10 MHz, 1 MHz, 100 kHz or 10 kHz. The DC offset cancellation
occurs simultaneously with the AGC settling process. During the
AGC settling phase (see below) the cutoff frequency is dynamically
selected between 10 MHz and 1 MHz to quickly reduce DC offset
values from +50 dBc to below –20 dBc relative to a –76 dBm
antenna input signal before the RSSI (see below) is internally
sampled. After the AGC settling, the high pass is configured for
100 kHz for 5 µs before switching to a final 10 kHz cutoff frequency.
The low value of 10 kHz is required for minimizing the signal
distortion created by a high-pass function at zero frequency. The
high-pass will then remain set to the 10 kHz cutoff frequency until a
new AGC cycle is started.
Whenever there is a frequency change in the high-pass filter lower
cutoff, the DC offset can change from a very low value to about 50%
(1 MHz ≥ 100 kHz step) or 10% (100 kHz ≥ 10 kHz step) of the
signal level. This DC offset then decays according to the high-pass
response of the filter.
The cutoff frequency of the high-pass filter can also be selected
manually by using the RXMGC mode.
6.6 AGC
The receiver contains a fully integrated Automatic Gain Control loop.
It works by adjusting the internal gain such that the Rx output
amplitude, as measured by the RSSI (see below), meets a
predefined target value.
By default, the AGC is always set to a default maximum gain
(adjustable by register value GMAX) whenever the SA2400A enters
the RECEIVE mode of operation from another operational mode. It
takes 5 µs for the receiver to settle when it enters this mode, which
includes the time for DC offsets to be removed with a 1 MHz lower
cut-off frequency of the high-pass filtering. This lower cut-off
frequency of 1 MHz remains unchanged as long as the AGC
remains in the default maximum gain state.
The AGC must be invoked by providing a 0-to-1 transition on the
AGCRESET pin, and keeping the signal on that pin to 1 for at least
5 µs.
By successively reducing the gain from its initial maximum value,
the loop searches for the correct gain value to provide a nominal
output amplitude of 500 mVpeak, differential for a QPSK signal (within
±3 dB dynamic error) at the output pins. This is achieved after a
maximum of 8 µs. This time is defined by wait periods necessary to
settle the receiver after gain switching actions. The individual wait
periods can be adjusted by means of register settings.
After completing the AGC settling process, the AGCSET pin is set to
1 by the algorithm. The receiver gain then will not change again until
another pulse is issued on the AGCRESET pin.
For a subsequent AGC operation, the receiver needs to enter its
maximum gain state again. If another AGCRESET signal (as
described above) is issued, the settling period will take an extra
3 µs, up to a total of 11 µs, since the first 3 µs will be spent on
entering maximum gain mode and settling the receiver thereafter. To
shorten this operation, the receiver can be forced to maximum gain
(e.g., at a time when no signal is present) by issuing a 0–1–0 pulse
of maximum 1 µs pulse width on the AGCRESET pin. The receiver
will then enter maximum gain mode (the AGCSET signal will not be
set to 1 after this), and a following 0-to-1 transition on the
AGCRESET pin will start the settling sequence from maximum gain,
which will then take a maximum of 8 µs.
The receiver gain can also be selected manually by using the
RXMGC mode.
The settling target can be adjusted by ±7 dB from the nominal level
of 500 mVpeak, differential by means of register settings.
Note: When doing measurements with a single-tone RF signal, the
amplitude at the Rx outputs after settling the AGC will be lower, at
about 300 mVpeak, differential.
2002 Nov 04
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