SA2400A Datasheet, PDF (12/34 Pages) NXP Semiconductors – Single chip transceiver for 2.45 GHz ISM band

Philips Semiconductors
Single chip transceiver for 2.45 GHz ISM band
Product data
SA2400A
9.1 AGC handshake and timing
TXRX
AGCRESET
AGCSET
T_drxon
T_h,agcreset
T_dsettle
T_reset
T_restart
T_r,agcreset
Rx
TURN-ON
REGULAR SETTLING
SET
MAXGAIN
REGULAR
SETTLING
Figure 3. AGC handshake and timing.
SR02417
Table 7. AGC timing
Symbol Parameter
Condition
Min
Typ
Max
AGC logic level requirements
V_IH
HIGH-level logic input voltage
V_IL
LOW-level logic input voltage
AGCRESET timing
0.5×V_DD –
–0.3
–
V_DD+0.3
0.2×V_DD
T_r,agcreset
T_h,agcreset
Input rise time
Input hold time
–
To execute AGC settling
5
To set AGC to max. Gain –
10
40
8
–
0.5
1
T_restart
Time between AGC cycles (Note 1)
AGCSET timing
1
–
–
T_drxon
Settling time after switching to Rx
–
–
5
T_reset
Clearing time after AGCRESET
–
–
180
T_dsettle
AGC settling time
–
–
11
NOTES:
1. In certain time interval further AGCRESET rising edges will not be detected. This applies for 4.3 µs < T_restart < 4.8 µs.
Units
V
V
ns
µs
µs
µs
µs
ns
µs
2002 Nov 04
12