SAA7712H Datasheet, PDF (7/44 Pages) NXP Semiconductors – Sound effects DSP

Philips Semiconductors
Sound effects DSP
Preliminary specification
SAA7712H
7 PINNING INFORMATION
SYMBOL PIN
DESCRIPTION
PIN TYPE
n.c.
1 not connected
n.c.
2 not connected
n.c.
3 not connected
n.c.
4 not connected
n.c.
5 not connected
n.c.
6 not connected
n.c.
7 not connected
POM
8 power-on mute; timing determined by external capacitor
AP2D
OUT3_V
9 analog voltage output 3
AP2D
OUT3_I
10 analog current output 3
AP2D
OUT2_I
11 analog current output 2
AP2D
OUT2_V
12 analog voltage output 2
AP2D
V_SSA2
V_DDA2
VREFDA
13 analog ground supply 2
14 analog supply voltage 2 (3 V)
15 voltage reference of the analog part
APVSS
APVDD
AP2D
OUT1_V
16 analog voltage output 1
AP2D
OUT1_I
17 analog current output 1
AP2D
OUT0_I
18 analog current output 0
AP2D
OUT0_V
19 analog voltage output 0
AP2D
EQOV
20 equalizer overflow line output
B4CR
SYS_CLK
21 test pin output
BT4CR
V_DDD5V1
V_SSD5V1
I²S_IN2_WS
I²S_IN2_DATA
I²S_IN2_BCK
I²S_IN1_WS
I²S_IN1_DATA
I²S_IN1_BCK
I²S_IO_BCK
I²S_IO_IN1
I²S_IO_IN2
I²S_IO_WS
22 digital supply voltage 1; peripheral cells only (3 or 5 V)
VDD5
23 digital ground supply 1; peripheral cells only (3 or 5 V)
VSS5
24 I²S-bus or LSB-justified format word select input from a digital audio source 2 IBUFD
25 I²S-bus or LSB-justified format left-right data input from a digital audio
source 2
IBUFD
26 I²S-bus clock or LSB-justified format input from a digital audio source 2
IBUFD
27 I²S-bus or LSB-justified format word select input from a digital audio source 1 IBUFD
28 I²S-bus or LSB-justified format left-right data input from a digital audio
source 1
IBUFD
29 I²S-bus clock or LSB-justified format input from a digital audio source 1
IBUFD
30 I²S-bus bit clock output for interface with DSP co-processor chip
BT4CR
31 I²S-bus input data channel 1 from DSP co-processor chip
IBUFD
32 I²S-bus input data channel 2 from DSP co-processor chip
IBUFD
33 I²S-bus word select output for interface with DSP co-processor chip
BT4CR
V_DDD5V2
V_SSD5V2
I²S_IO_OUT1
I²S_IO_OUT2
34 digital supply voltage 2; peripheral cells only (3 or 5 V)
35 digital ground supply 2; peripheral cells only (3 or 5 V)
36 I²S-bus output data channel 1 to DSP co-processor chip
37 I²S-bus output data channel 2 to DSP co-processor chip
VDD5
VSS5
BT4CR
BT4CR
DSP_IN1
38 digital input 1 of the DSP core (F0 of the status register)
IBUFD
1999 Aug 05
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