SAA7712H Datasheet, PDF (28/44 Pages) NXP Semiconductors – Sound effects DSP

Philips Semiconductors
Sound effects DSP
Preliminary specification
SAA7712H
Table 11 I²C_ADDA register (0FFDH)
NAME
−
pll_fs_sel
dsp_turbo
two_four
−
pc_reset
SIZE
(BITS)
DESCRIPTION
DEFAULT
10 reserved
1 divide oscillator by 2 (logic 1)
division
1 double DSP_clock (logic 1)
doubling
1 2-channel 10-band (logic 1) or 4-channel 5-band (logic 0) 4-channel
equalizer configuration
5-band
2 reserved
1 re-start DSP algorithm (logic 1) or DSP running (logic 0) DSP running
BIT
POSITION
9 to 0
10
11
12
14 and 13
15
Table 12 I²C_SEL register (0FFAH)
NAME
−
bypass_pll
−
inv_host_ws
−
SIZE
(BITS)
DESCRIPTION
8 reserved
1 bypass PLL used for DSP_clock (logic 1) or use PLL for
DSP_clock (logic 0)
4 reserved
1 inverting (logic 1) or non-inverting (logic 0) word select
2 reserved
DEFAULT
use PLL
non-inverting
BIT
POSITION
7 to 0
8
12 to 9
13
15 and 14
Table 13 I²C_HOST register (0FF9H)
NAME
SIZE
(BITS)
DESCRIPTION
−
audio_source
5 reserved
1 input source is I²S_IN1 or I²S_IN2 (see Table 3)
−
1 reserved
audio_format
3 format of selected input source (see Table 2)
host_io_format 2 host input/output data format (see Table 4)
en_host_io
1 enable (logic 1) or disable (logic 0) co-processor I²S-bus
cloop_mode
3 cloop mode (see Table 5)
DEFAULT
BIT
POSITION
I²S_IN1
4 to 0
5
6
standard I²S-bus 9 to 7
standard I²S-bus 11 and 10
disable
12
bypass WS
15 to 13
1999 Aug 05
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