BUK112-50GL Datasheet, PDF (7/16 Pages) NXP Semiconductors – PowerMOS transistor Logic level TOPFET

Philips Semiconductors
PowerMOS transistor
Logic level TOPFET
Product specification
BUK112-50GL
VIN
VIS (input)
0V
VCC
VGS (internal)
0V
VDS(OFF)
VDS (output)
VDS(ON)
SHORT
CIRCUIT
FAULT
VCC
VPS (protection supply)
0V
LOSS OF
PROT’N SUPPLY
PROTECTION
RESET
PROTECTION
RESET
VCC
VFS (flag)
0V
NORMAL
OPERATION
FAULT
CONDITION
NORMAL
OPERATION
FAULT
CONDITION
Fig. 4. Waveforms for normal and fault conditions.
NORMAL
OPERATION
VIN
VIS (input)
0V
VCC
VGS (internal)
0V
VDS(OFF)
VDS (output)
VDS(ON)
VCC
VPS (protection supply)
0V
VCC
VFS (flag)
0V
NORMAL
OPERATION
OPEN
LOAD
NORMAL
OPERATION
OPEN
LOAD
Fig. 5. Waveforms for normal and open circuit load.
NORMAL
OPERATION
September 1996
7
Rev 1.000