BUK112-50GL Datasheet, PDF (1/16 Pages) NXP Semiconductors – PowerMOS transistor Logic level TOPFET

Philips Semiconductors
PowerMOS transistor
Logic level TOPFET
Product specification
BUK112-50GL
DESCRIPTION
Monolithic temperature and
overload protected logic level power
MOSFET in a 5 pin plastic
envelope, intended as a low side
switch for automotive applications.
FEATURES
Vertical power DMOS output
stage
Low on-state resistance
Low operating supply current
Overtemperature protection
Overload protection against
short circuit load with
drain current limiting
Latched overload protection
reset by protection supply
Protection circuit condition
indicated by flag pin
Off-state detection
of open circuit load
indicated by flag pin
5 V logic compatible input level
Integral input resistors.
ESD protection on all pins
Over voltage clamping
QUICK REFERENCE DATA
SYMBOL PARAMETER
V_DS
I_D
T_j
R_DS(ON)
SYMBOL
Continuous drain source voltage
Continuous drain current
Continuous junction temperature
Drain-source on-state resistance
PARAMETER
V_PS
Protection supply voltage
FUNCTIONAL BLOCK DIAGRAM
PROTECTION SUPPLY
FLAG
INPUT
OC LOAD
DETECT
RIG
O/V
CLAMP
LOGIC AND
PROTECTION
RIS
MAX.
50
12
150
93
NOM.
5
UNIT
V
A
˚C
mΩ
UNIT
V
DRAIN
POWER
MOSFET
SOURCE
PINNING - SOT263
PIN
DESCRIPTION
1 input
2 flag
3 drain
4 protection supply
5 source
tab drain
Fig.1. Elements of the TOPFET.
PIN CONFIGURATION
SYMBOL
tab
1 2345
leadform
263-01
Fig. 2.
D
TOPFET
P
F
P
I
S
Fig. 3.
September 1996
1
Rev 1.000