SAA1575HL Datasheet, PDF (6/56 Pages) NXP Semiconductors – Global Positioning System GPS baseband processor

Philips Semiconductors
Global Positioning System (GPS)
baseband processor
Product specification
SAA1575HL
6 PINNING
SYMBOL PIN
SCLK
1
T1S
2
TP3
3
TP4
4
GPIO5
5
GPIO6
6
GPIO7
7
n.c.
8
n.c.
9
A19
10
A18
11
V_CC(core)
12
V_SS
13
XTAL1
14
XTAL2
15
V_CC(P)
16
V_SS
17
A17
18
A16
19
A15
20
A14
21
A13
22
A12
23
I/O
DESCRIPTION
O Sample clock: sample clock generated internally by dividing down the RCLK
(reference clock) input. This output is provided for use by the front-end IC.
O GPS time pulse: a 1 pulse per second output whose rising or falling edge (firmware
controlled) is synchronized to GPS time when the receiver is tracking a GPS signal.
The pulse length is approximately 1 ms.
I Test pin: tie HIGH
I Test pin: tie HIGH
I/O GPIO bit 5: standard general purpose I/O mapped into the segment 15 of the address
space. The top 4 bits can be used as the XA external timer control access pins
(T0, T1, T2 and T2EX).
I/O GPIO bit 6: standard general purpose I/O mapped into the segment 15 of the address
space. The top 4 bits can be used as the XA external timer control access pins
(T0, T1, T2 and T2EX).
I/O GPIO bit 7: standard general purpose I/O mapped into the segment 15 of the address
space. The top 4 bits can be used as the XA external timer control access pins
(T0, T1, T2 and T2EX).
O Not connected: do not connect
O Not connected: do not connect
O External memory address bus bit 19: 19-bit address bus; used to address external
RAM and program memory
O External memory address bus bit 18: 19-bit address bus; used to address external
RAM and program memory
− Main core power supply: 2.7 to 3.6 V only; main supply for the core in normal
operation
− Ground: 0 V reference
I Crystal 1: input to the inverting amplifier; used in the system oscillator circuit and
input to the internal clock generator circuits
O Crystal 2: output from the system oscillator amplifier
− Main I/O power supply: 2.7 to 5.5 V operating range; main supply for the periphery
in normal operation
− Ground: 0 V reference
O External memory address bus bit 17: 19-bit address bus; used to address external
RAM and program memory
O External memory address bus bit 16: 19-bit address bus; used to address external
RAM and program memory
O External memory address bus bit 15: 19-bit address bus; used to address external
RAM and program memory
O External memory address bus bit 14: 19-bit address bus; used to address external
RAM and program memory
O External memory address bus bit 13: 19-bit address bus; used to address external
RAM and program memory
O External memory address bus bit 12: 19-bit address bus; used to address external
RAM and program memory
1999 Jun 04
6