TDA4841PS Datasheet, PDF (42/60 Pages) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors

Philips Semiconductors
I²C-bus autosync deflection controller for
PC monitors
Soft-start and soft-down sequences
Product specification
TDA4841PS
handbook, full pagewidth
VHPLL2
MHB495
duty ^{cycle increases}
4.6 V
continuous blanking off
PLL2 enabled
frequency detector enabled
HDRV/HFLB protection enabled
4.0 V BDRV duty cycle has reached nominal value
3.2 V BDRV duty cycle begins to increase
HDRV duty cycle has reached nominal value
1.8 V HDRV duty cycle begins to increase
1.0 V VOUT1 and VOUT2 enabled
time
a. Soft-start sequence for V_CC > 8.6 V.
handbook, full pagewidth
VHPLL2
MHB496
4.6 V
continuous blanking (pin 16 and 17) activated
PLL2 disabled
frequency detector disabled
HDRV/HFLB protection disabled
4.0 V BDRV duty cycle begins to decrease⁽¹⁾
duty _{cycle decreases}
2.8 V BDRV floating
HDRV duty cycle begins to decrease⁽¹⁾
1.8 V HDRV floating
1.0 V VOUT1 and VOUT2 floating
time
b. Soft-down sequence for V_CC > 8.6 V.
(1) Pins HDRV and BDRV are floating for V_CC < 8.6 V.
Fig.23 Activation of PLL2 soft-start and soft-down sequences via the I²C-bus.
1999 Oct 25
42