TDA4841PS Datasheet, PDF (36/60 Pages) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors

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List of I²C-bus controlled functions
I²C-bus data can be transmitted in direct or buffered mode and is defined by the MSB of the register subaddress:
• SAD1 is the register subaddress to be used for transmissions in direct mode
• SAD2 is the register subaddress to be used for transmissions in buffered mode.
Table 6 Controlled functions; notes 1 and 2
FUNCTION
NAME
Horizontal size
Horizontal position
HSIZE
HPOS
Horizontal pincushion HPIN
Horizontal trapezium HTRAP
correction
Horizontal corner
correction at top of
picture
Horizontal corner
correction at bottom
of picture
Horizontal
parallelogram
EW pin balance
HCORT
HCORB
HPARAL
HPINBAL
Vertical size
Vertical position
Vertical gain
Vertical offset
Vertical linearity
VSIZE
VPOS
VGAIN
VOFFS
VLIN
Vertical linearity
balance
VLINBAL
BITS
8
8
6
6
6
6
6
6
7
7
6
4
4
4
SAD1 SAD2
REGISTER ASSIGNMENT
CTRL
(HEX) (HEX) _{D7 D6 D5 D4 D3 D2 D1 D0} BIT
RANGE
01 81 D7 D6 D5 D4 D3 D2 D1 D0 − 0.1 to 3.6 V
07 87 D7 D6 D5 D4 D3 D2 D1 D0 − ±13% of horizontal
period
0F 8F X # D5 D4 D3 D2 D1 D0 − 0 to 1.42 V
03 83 X X D5 D4 D3 D2 D1 D0 − ±500 mV (p-p)
04 84 X # D5 D4 D3 D2 D1 D0 VSC +15 to −46% of
parabola amplitude
02 82 X # D5 D4 D3 D2 D1 D0 VSC +15 to −46% of
parabola amplitude
09 89 # # D5 D4 D3 D2 D1 D0 ACD ±1.2% of horizontal
period
0B 8B # # D5 D4 D3 D2 D1 D0 ACD ±1.2% of horizontal
period
08 88 # D6 D5 D4 D3 D2 D1 D0 − 60 to 100%
0D 8D X D6 D5 D4 D3 D2 D1 D0 − ±11.5%
0A 8A X # D5 D4 D3 D2 D1 D0
70 to 100%
0E 8E # # # # D3 D2 D1 D0
±4%
05 85 D7 D6 D5 D4 # # # # VSC −2 to −46%
05 85 # # # # D3 D2 D1 D0 − ±1.4% of 100%
vertical size
FUNCTION
TRACKS WITH
−
−
VSIZE, VOVSCN,
VPOS, HSIZE and
HSMOD
VSIZE, VOVSCN,
VPOS, HSIZE and
HSMOD
VSIZE, VOVSCN,
VPOS, HSIZE and
HSMOD
VSIZE, VOVSCN,
VPOS, HSIZE and
HSMOD
VSIZE, VOVSCN
and VPOS
VSIZE, VOVSCN
and VPOS
VSMOD
VSMOD
−
−
VSIZE, VOVSCN,
VPOS and VSMOD
VSIZE, VOVSCN,
VPOS and VSMOD