TDA4841PS Datasheet, PDF(27/60 Page) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors

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TDA4841PS Datasheet, PDF (27/60 Pages) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors

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Philips Semiconductors

I2C-bus autosync deï¬ection controller for

PC monitors

Product speciï¬cation

TDA4841PS

8. All vertical and EW adjustments are specified at nominal vertical settings; unless otherwise specified, which means:

a) VSIZE = 100% (register VSIZE = 127, VGAIN = 63 and control bit VOVSCN = 0)

b) VSMOD = 0 (no EHT compensation)

c) VPOS centred (register VPOS = 64)

d) VLIN = 0 (register VLIN = X and control bit VSC = 1)

e) VLINBAL = 0 (register VLINBAL = 8)

f) FHMULT = 0

g) HPARAL = 0 (register HPARAL = 32)

h) HPINBAL = 0 (register HPINBAL = 32)

i) Vertical oscillator synchronized.

9. The output signal at EWDRV (pin 11) may consist of horizontal pincushion + corner correction + DC shift + trapezium

correction. If the VOVSCN control bit is set, and the VPOS adjustment is set to an extreme value, the tip of the

parabola may be clipped at the upper limit of the EWDRV output voltage range. The waveform of corner correction

will clip if the vertical sawtooth adjustment exceeds 110% of the nominal setting.

10. If fH tracking is enabled, the amplitude of the complete EWDRV output signal (horizontal pincushion + corner

correction + DC shift + trapezium) will be changed proportional to IHREF. The EWDRV low level of 1.2 V remains fixed.

11. First pole of transconductance amplifier is 5 MHz without external capacitor (will become the second pole, if the OTA

operates as an integrator).

12. Open-loop gain is V--V---B-B--O-I--N-P- at f = 0 with no resistive load and CBOP = 10 nF (from BOP (pin 3) to GND).

13. The recommended value for the pull-up resistor at pin 6 (BDRV) is 1 kâ¦.

1999 Oct 25

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