TDA4841PS Datasheet, PDF (19/60 Pages) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors

Philips Semiconductors
I²C-bus autosync deflection controller for
PC monitors
Product specification
TDA4841PS
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
HORIZONTAL FLYBACK INPUT: PIN HFLB
V_pos(HFLB)
V_neg(HFLB)
I_pos(HFLB)
I_neg(HFLB)
V_sl(HFLB)
positive clamping level
negative clamping level
positive clamping current
negative clamping current
slicing level
Output stage for line driver pulses: pin HDRV
I_i(HFLB) = 5 mA
I_i(HFLB) = −1 mA
−
5.5
−
V
−
−0.75 −
V
−
−
6
mA
−
−
−2
mA
−
2.8
−
V
OPEN-COLLECTOR OUTPUT STAGE
V_sat(HDRV)
I_LO(HDRV)
saturation voltage
output leakage current
I_o(HDRV) = 20 mA
I_o(HDRV) = 60 mA
V_HDRV = 16 V
−
−
0.3
V
−
−
0.8
V
−
−
10
µA
AUTOMATIC VARIATION OF DUTY CYCLE
t_HDRV(OFF)/t_H
relative t_OFF time of HDRV
I_o(HDRV) = 20 mA;
42
45
48
%
output; measured at
f_H = 31.45 kHz; see Fig.16
V_HDRV = 3 V; HDRV duty cycle
is modulated by the relation
I_HREF/I_VREF
I_o(HDRV) = 20 mA;
f_H = 58 kHz; see Fig.16
I_o(HDRV) = 20 mA;
45.5 48.5 51.5 %
49
52
55
%
f_H = 110 kHz; see Fig.16
X-ray protection: pin XRAY
V_XRAY(sl)
t_W(XRAY)(min)
R_i(XRAY)
XRAY_rst
V_{CC(XRAY)(min)}
V_{CC(XRAY)(max)}
R_XSEL
slicing voltage level for latch
minimum width of trigger pulse
input resistance at XRAY
(pin 2)
reset of X-ray latch
minimum supply voltage for
correct function of the X-ray
latch
maximum supply voltage for
reset of the X-ray latch
external resistor at pin 9
V_XRAY < 6.38 V + V_BE
V_XRAY > 6.38 V + V_BE
standby mode
pin 9 open-circuit or
connected to GND
pin 9 connected to V_CC via
R_XSEL
pin 9 connected to V_CC via
R_XSEL
pin 9 connected to V_CC via
R_XSEL
no reset via I²C-bus
6.22 6.39 6.56 V
−
−
30
µs
500 −
−
kΩ
−
5
−
kΩ
−
5
−
kΩ
set control bit SOFTST via I²C-bus
switch off V_CC, then re-apply V_CC
−
−
4
V
2
−
56
−
−
V
130 kΩ
1999 Oct 25
19