TDA4841PS Datasheet, PDF (28/60 Pages) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors

Philips Semiconductors
I²C-bus autosync deflection controller for
PC monitors
Vertical and EW adjustments
Product specification
TDA4841PS
handbo_Io_Vk,_Oh_Ual_Tfp₁age
IVOUT2
MBG590
∆l2 ∆l1⁽¹⁾
handbook, halfpage
IVOUT1
IVOUT2
MGS274
∆ I1⁽¹⁾
∆ I2
t
(1) ∆I₁ is the maximum amplitude setting at register VSIZE = 127,
register VGAIN = 63, control bit VOVSCN = 0.
VSIZE = ^∆-_∆---II--²¹- × 100%
VSMOD = _∆∆----II--²¹- × 100%
Fig.3 Adjustment of vertical size.
t
(1) ∆I₁ is the maximum amplitude setting at register VSIZE = 127,
register VGAIN = 63, control bit VOVSCN = 0.
VGAIN = _∆∆----II--²¹- × 100%
Fig.4 Adjustment of vertical size.
handb_Io_Vo_Ok,_Uh_Tal₁fpage
IVOUT2
MBG592
∆l1⁽¹⁾ ∆l2
handboo_Ik_V, _Oha_Ulf_Tpa₁ge
IVOUT2
MBG594
∆l2/∆t
∆l1⁽¹⁾/∆t
t
t
(1) ∆I₁ is the maximum amplitude setting at register VSIZE = 127
and register VGAIN = 63.
VPOS = ^∆---2-I--²--_×--^–--_∆---^∆-I--₁^I--1- × 100%
VOFFS = -^∆--2-I--²--_×--^–--_∆---^∆-I--₁^I--1- × 100%
Fig.5 Adjustment of vertical position.
(1) ∆I₁ is the maximum amplitude setting at register VSIZE = 127
and VLIN = 0%.
VLIN = ^∆----I--¹--_∆--^–-I--₁--^∆---I--²- × 100%
Fig.6 I_VOUT1 and I_VOUT2 as functions of time.
1999 Oct 25
28