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TDA4841PS Datasheet, PDF (31/60 Pages) NXP Semiconductors – I2C-bus autosync deflection controller for PC monitors
Philips Semiconductors
I2C-bus autosync deflection controller for
PC monitors
Pulse diagrams
Product specification
TDA4841PS
handbook, full pagewidth
vertical oscillator sawtooth
at VCAP (pin 24)
vertical sync pulse
internal trigger
inhibit window
(typical 4 ms)
vertical blanking pulse
at CLBL (pin 16)
vertical blanking pulse
at HUNLOCK (pin 17)
differential output currents
VOUT1 (pin 13) and
VOUT2 (pin 12)
EW drive waveform
at EWDRV (pin 11)
4.0 V automatic trigger level
3.8 V synchronized trigger level
1.4 V
inhibited
IVOUT1
IVOUT2
7.0 V maximum
DC shift 3.6 V maximum
low-level 1.2 V fixed
MGM075
1999 Oct 25
Fig.14 Pulse diagram for vertical part.
31