PLC42VA12 Datasheet, PDF (10/20 Pages) NXP Semiconductors – CMOS programmable multi-function PLD 42 × 105 × 12

Philips Semiconductors Programmable Logic Devices
CMOS programmable multi-function PLD
(42 × 105 × 12)
OUTPUT MACRO CELL PROGRAMMABLE OPTIONS
REGISTER
SELECT
OPTIONS
POLARITY
OPTIONS
OUTPUT MACRO CELL
CLOCK OPTIONS
OMC
CONFIGURATION
OPTIONS
OUTPUT ENABLE
CONTROL
OPTIONS
OUTPUT
M
ARCHITECTURAL OPTIONS
REGISTER SELECT OPTIONS
P
R
FROM
OR ARRAY
P
R
CK
D
Q
FROM
AND ARRAY
CLOCK
OPTIONS
OMC
CONFIG.
OPTIONS
OUTPUT
CONTROL
OPTIONS
REGISTER MODE (D or JK)
D-TYPE
F_C CONTROL P-TERM
CODE
A
L
P
R
FROM
OR ARRAY
FROM
AND ARRAY
Notes on page 87.
P
R
CK
J
K
Q
CLOCK
OPTIONS
OMC
CONFIG.
OPTIONS
REGISTER MODE (D or JK)
JK-TYPE
F_C CONTROL P-TERM
CODE
•
–
OUTPUT
CONTROL
OPTIONS
October 22, 1993
82
Product specification
PLC42VA12
OMC Programmable Options
For purposes of programming, the Output
Macro Cell should be considered to be
partitioned into five separate blocks. As
shown in the drawing titled “Output Macro Cell
Programmable Options”, the programmable
blocks are: Register Select Options, Polarity
Options, Clock Options, OMC Configuration
Options and Output Enable Control Options.
There is one programmable location
associated with each block except the Output
Enable Control block which has two
programmable fuse locations per OMC.
The following drawings detail the options
associated with each programmable block.
The associated programming codes are also
included. The table titled “Output Macro Cell
Configurations” (page 87) lists all the possible
combinations of the five programmable
options.
Register Select Options
Each OMC Register can be configured either
as a dedicated D-type or a J-K flip-flop. The
Flip-Flop Control term, Fc, provides the
option to control each Register
dynamically—switching from D-type to J-K
type, based on the Fc control signal.
Register Preset and Reset are controlled
from the AND array. Each OMC has an
individual Reset Control term (RMn). The
Register Preset function is controlled in two
banks of 4 for OMCs M1 – M3 and M4 – M8
(via the control terms PA and PB). OMCs M0
and M9 have individual control terms (PM0
and PM9 respectively).