OX9160 Datasheet, PDF(13/38 Page) Oxford Semiconductor – PCI Peripheral Bridge with EPP Parallel Port & 8/32 bit local bus

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OX9160 Datasheet, PDF (13/38 Pages) Oxford Semiconductor – PCI Peripheral Bridge with EPP Parallel Port & 8/32 bit local bus

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OXFORD SEMICONDUCTOR LTD.

OX9160

4.4.2 Multi-purpose I/O Configuration register âMICâ (Offset 0x04)

This register configures the operation of the multi-purpose I/O pins âMIO[11:0] as follows.

Bits

1:0

3:2

5:4

7:6

9:8

11:10

13:12

15:14

17:15

Description

MIO0 Configuration Register (Mode[1:0]â â01â).

00 -> MIO0 is a non-inverting input pin

01 -> MIO0 is an inverting input pin

10 -> MIO0 is an output pin driving â0â

11 -> MIO0 is an output pin driving â1â

Unused (Mode[1:0]=â01â). When the Parallel Port is enabled, MIO[0] pin

is unused and will remain in forcing output mode.

MIO1 Configuration Register

00 -> MIO1 is a non-inverting input pin

01 -> MIO1 is an inverting input pin

10 -> MIO1 is an output pin driving â0â

11 -> MIO1 is an output pin driving â1â

MIO2 Configuration Register (LCC[7]=â0â).

00 -> MIO2 is a non-inverting input pin

01 -> MIO2 is an inverting input pin

10 -> MIO2 is output pin driving â0â

11 -> MIO2 is output pin driving â1â

PME_Input (LCC[7]=â1â). When LCC[7] is set, MIO2 pin is re-defined to

PME_Input. Itâs polarity will be controlled by MIC[4]. It sets the sticky

PME_Status bit.

MIO3 Configuration Register.

00 -> MIO3 is a non-inverting input pin

01 -> MIO3 is an inverting input pin

10 -> MIO3 is an output pin driving â0â

11 -> MIO3 is an output pin driving â1â

MIO4 Configuration Register.

00 -> MIO4 is a non-inverting input pin

01 -> MIO4 is an inverting input pin

10 -> MIO4 is an output pin driving â0â

11 -> MIO4 is an output pin driving â1â

MIO5 Configuration Register.

00 -> MIO5 is a non-inverting input pin

01 -> MIO5 is an inverting input pin

10 -> MIO5 is an output pin driving â0â

11 -> MIO5 is an output pin driving â1â

MIO6 Configuration Register.

00 -> MIO6 is a non-inverting input pin

01 -> MIO6 is an inverting input pin

10 -> MIO6 is an output pin driving â0â

11 -> MIO6 is an output pin driving â1â

MIO7 Configuration Register.

00 -> MIO7 is a non-inverting input pin

01 -> MIO7 is an inverting input pin

10 -> MIO7 is an output pin driving â0â

11 -> MIO7 is an output pin driving â1â

MIO8 Configuration Register.

00 -> MIO8 is a non-inverting input pin

Read/Write

EEPROM

PCI

Data Sheet Revision 1.22

Reset

Page 13

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