AR0134CS_16 Datasheet, PDF (8/38 Pages) ON Semiconductor – 1/3-Inch 1.2 Mp CMOS Digital Image Sensor

AR0134CS: 1/3-Inch 1.2 Mp CMOS Digital Image Sensor
Configuration and Pinout
Configuration and Pinout
The figures and tables below show a typical configuration for the AR0134 image sensor
and show the package pinouts.
Figure 4: Typical Configuration: Serial Four-Lane HiSPi Interface
Digital Digital
I/O Core
power¹ power¹
HiSPi
PLL Analog Analog
power¹ power¹ power¹ power¹
Master clock
(6–50 MHz)
From
controller
VDD_IO VDD
EXTCLK
SDATA
SCLK
OE_BAR
STANDBY
RESET_BAR
TEST
DGND
VDD_PLL VAA VAA_PIX
SLVS0_P
SLVS0_N
SLVS1_P
SLVS1_N
SLVS2_P
SLVS2_N
SLVS3_P⁷
SLVS3_N⁷
SLVSC_P
SLVSC_N
FLASH
AGND
To
controller
VDD_IO
VDD
VDD_SLVS VDD_PLL
VAA
VAA_PIX
Digital
ground
Analog
ground
Notes:
1. All power supplies must be adequately decoupled.
2. ON Semiconductor recommends a resistor value of 1.5k, but it may be greater for slower two-wire
speed.
3. This pull-up resistor is not required if the controller drives a valid logic level on SCLK at all times.
4. The parallel interface output pads can be left unconnected if the serial output interface is used.
5. ON Semiconductor recommends that 0.1μF and 10μF decoupling capacitors for each power supply
are mounted as close as possible to the pad. Actual values and results may vary depending on lay-
out and design considerations. Refer to the AR0134 demo headboard schematics for circuit recom-
mendations.
6. ON Semiconductor recommends that analog power planes be placed in a manner such that cou-
pling with the digital power planes is minimized.
7. Although 4 serial lanes are shown, the AR0134 supports only 2 or 3 lane HiSPi.
AR0134CS/D Rev. 8, Pub. 1/16 EN
8
©Semiconductor Components Industries, LLC,2016.