AR0134CS_16 Datasheet, PDF (20/38 Pages) ON Semiconductor – 1/3-Inch 1.2 Mp CMOS Digital Image Sensor

AR0134CS: 1/3-Inch 1.2 Mp CMOS Digital Image Sensor
Electrical Specifications
Electrical Specifications
Unless otherwise stated, the following specifications apply to the following conditions:
VDD = 1.8V – 0.10/+0.15; VDD_IO = VDD_PLL = VAA = VAA_PIX = 2.8V ± 0.3V;
VDD_SLVS = 0.4V – 0.1/+0.2; T_A = -30°C to +70°C; output load = 10pF;
PIXCLK frequency = 74.25 MHz; HiSPi off.
Two-Wire Serial Register Interface
The electrical characteristics of the two-wire serial register interface (SCLK, SDATA) are
shown in Figure 14 and Table 5.
Figure 14: Two-Wire Serial Bus Timing Parameters
SDATA
tf
tLOW tr
tSU;DAT ^tf
tHD;STA
tr tBUF
SCLK
tHD;STA
S
tHD;DAT tHIGH
tSU;STA
Sr
tSU;STO
P
S
Note:
Read sequence: For an 8-bit READ, read waveforms start after WRITE command and register
address are issued.
Table 5:
Two-Wire Serial Bus Characteristics
f_{EXTCLK = 27 MHz; VDD = 1.8V; VDD_IO = 2.8V; VAA = 2.8V; VAA_PIX = 2.8V;}
VDD_PLL = 2.8V; VDD_DAC = 2.8V; T_A = 25°C
Parameter
SCLK Clock Frequency
Hold time (repeated) START condition.
After this period, the first clock pulse is
generated
LOW period of the SCLK clock
HIGH period of the SCLK clock
Set-up time for a repeated START
condition
Data hold time:
Data set-up time
Rise time of both SDATA and SCLK signals
Fall time of both SDATA and SCLK signals
Symbol
f_SCL
t_HD;STA
t_LOW
t_HIGH
t_SU;STA
t_HD;DAT
t_SU;DAT
t_r
t_f
Standard-Mode
Min
Max
0
100
Fast-Mode
Min
Max
Unit
0
400
KHz
4.0
-
0.6
-
S
4.7
-
1.3
-
S
4.0
-
0.6
-
S
4.7
-
0.6
-
S
0⁴
3.45⁵
0⁶
0.9⁵
S
250
-
100⁶
-
nS
-
1000
20 + 0.1Cb⁷
300
nS
-
300
20 + 0.1Cb⁷
300
nS
AR0134CS/D Rev. 8, Pub. 1/16 EN
20
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