AR0134CS_16 Datasheet, PDF (32/38 Pages) ON Semiconductor – 1/3-Inch 1.2 Mp CMOS Digital Image Sensor

AR0134CS: 1/3-Inch 1.2 Mp CMOS Digital Image Sensor
Power-On Reset and Standby Timing
Note:
t4 is required between power down and next power up time; all decoupling caps
from regulators must be completely discharged.
Standby Sequence
Figures 21 and 22 show timing diagrams for entering and exiting standby. Delays are
shown indicating the last valid register write prior to entering standby as well as the first
valid write upon exiting standby. Also shown is timing if the EXTCLK is to be disabled
during standby.
Figure 21: Enter Standby Timing
FV
E XTC L K
S DATA
R egister Writes Valid
S TANDBY
R egister Writes Not Valid
750 E XTC L Ks
50 E XTC L Ks
Figure 22: Exit Standby Timing
FV
E XTC L K
S DATA
S TANDBY
TR IGGE R
R egister Writes Not Valid
10 E XTC L Ks
R egister Writes Valid
1ms
28 rows + C IT
AR0134CS/D Rev. 8, Pub. 1/16 EN
32
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