ADP3210 Datasheet, PDF (35/38 Pages) ON Semiconductor – 7-Bit Programmable Multiphase Mobile CPU Synchronous

It is important for conversion efficiency that MOSFET drivers,
such as ADP3419, are placed as close to the MOSFETs as
possible. Thick and short traces are required between the driver
and MOSFET gate, especially for the SR MOSFETs. Ground the
MOSFET driver’s GND pin through immediately close vias.
Signal Circuitry
The output voltage is sensed and regulated between the FB pin
and the FBRTN pin, which connects to the signal ground at the
load. To avoid differential mode noise pickup in the sensed
signal, the loop area should be small. Thus, route the FB and
FBRTN traces adjacent to each other atop the power ground
plane back to the controller. To filter any noise from the FBRTN
ADP3210
trace, using a 1000 pF MLCC is suggested. It should be placed
between the FBRTN pin and local ground and as close to the
FBRTN pin as possible.
Connect the feedback traces from the switch nodes as close as
possible to the inductor. The CSREF signal should be Kelvin
connected to the center point of the copper bar, which is the
VCORE common node for the inductors of all phases.
In the back side of the ADP3210 package, a metal pad can be
used as the device heat sink. In addition, running vias under the
ADP3210 is not recommended because the metal pad can cause
shorting between vias.
Rev. 0.3 | Page 35 of 38