ADP3210 Datasheet, PDF (17/38 Pages) ON Semiconductor – 7-Bit Programmable Multiphase Mobile CPU Synchronous

referenced to FBRTN, and have a maximum current of 200 μA
to guarantee accurate remote sensing.
OUTPUT CURRENT SENSING
The ADP3210 provides a dedicated current-sense amplifier
(CSA) to monitor the total output current of the converter for
proper voltage positioning vs. load current, and for current-
limit detection. Sensing the load current being delivered to the
load is inherently more accurate than detecting peak current or
sampling the current across a sense element, such as the low-
side MOSFET. The current-sense amplifier can be configured
several ways depending on system requirements.
• Output inductor DCR sensing without use of a thermistor
for lowest cost
• Output inductor DCR sensing with use of a thermistor that
tracks inductor temperature to improve accuracy
• Discrete resistor sensing for highest accuracy
The positive input of the CSA is connected to the CSREF pin,
which is connected to the output voltage. At the negative input
CSSUM pin of the CSA, signals from the sensing element
(that is, in case of inductor DCR sensing, signals from the
switch node side of the output inductors) are summed together
by using series summing resistors. The feedback resistor
between CSCOMP and CSSUM sets the gain of the current-
sense amplifier, and a filter capacitor is placed in parallel
with this resistor. The current information is then given as
the voltage difference between CSREF and CSCOMP. This
signal is used internally as a differential input for the current-
limit comparator.
An additional resistor divider connected between CSREF and
CSCOMP with the midpoint connected to LLINE can be used
to set the load line required by the microprocessor specification.
The current information for load line setting is then given as
the voltage difference of CSREF − LLINE. The configuration in
the previous paragraph makes it possible for the load line slope
to be set independently of the current-limit threshold. In the
event that the current-limit threshold and load line do not have
to be independent, the resistor divider between CSREF and
CSCOMP can be omitted and the CSCOMP pin can be
connected directly to LLINE. To disable voltage positioning
entirely (that is, to set no load line), tie LLINE to CSREF.
To provide the best accuracy for current sensing, the CSA is
designed to have a low offset input voltage. In addition, the
sensing gain is set by an external resistor ratio.
ADP3210
ACTIVE IMPEDANCE CONTROL MODE
To control the dynamic output voltage droop as a function of
the output current, the signal proportional to the total output
current is converted to a voltage that appears between CSREF
and LLINE. This voltage can be scaled to equal the droop voltage,
which is calculated by multiplying the droop impedance of the
regulator with the output current. The droop voltage is then
used as the control voltage of the PWM regulator. The droop
voltage is subtracted from the DAC reference output voltage
and determines the voltage positioning setpoint. The setup
results in an enhanced feed-forward response.
CURRENT CONTROL MODE AND THERMAL
BALANCE
The ADP3210 has individual inputs for monitoring the current in
each phase. The phase current information is combined with an
internal ramp to create a current balancing feedback system
that is optimized for initial current accuracy and dynamic
thermal balance. The current balance information is
independent of the total inductor current information used for
voltage positioning described in the Active Impedance Control
Mode section.
The magnitude of the internal ramp can be set so the transient
response of the system becomes optimal. The ADP3210 also
monitors the supply voltage to achieve feed-forward control
whenever the supply voltage changes. A resistor connected from
the power input voltage rail to the RAMP pin determines the
slope of the internal PWM ramp. Detailed information about
programming the ramp is given in the Ramp Resistor Selection
section.
External resistors are placed in series with the SW1, SW2 and
SW3 pins to create an intentional current imbalance, if desired.
Such a condition can exist when one phase has better cooling
and supports higher currents than the other phase. Resistor
RSW2 and Resistor RSW3 (see the typical application circuit in
figure 36.) can be used to adjust thermal balance. It is
recommended to add these resistors during the initial design to
make sure placeholders are provided in the layout.
To increase the current in any given phase, users should make
RSW for that phase larger (that is, make RSW = 1 kΩ for the
hottest phase and do not change it during balance
optimization). Increasing RSW to 1.5 kΩ makes a substantial
increase in phase current. Increase each RSW value by small
amounts to achieve thermal balance starting with the coolest
phase.
If adjusting current balance between phases is not needed,
switch resistors should be 1 kΩ for all phases.
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