ADP3210 Datasheet, PDF (19/38 Pages) ON Semiconductor – 7-Bit Programmable Multiphase Mobile CPU Synchronous

In 3 phase configuration with all 3 phase switching, current
limit occurs when the current in the Rlim resistor is 20 μA. In 3
phase configuration with only phase 1 switching, current limit
occurs when the current in the Rlim resistor is 6.7 μA. In 2 phase
configuration with both phases switching, current limit occurs
when the current in the Rlim resistor is 20 μA. In 2 phase
configuration with only phase 1 switching, current limit occurs
when the current in the Rlim resistor is 10 μA. In single [ahse
configuration, current limit occurs when the current in the Rlim
resistor is 20 μA
ADP3210
incremental steps from the start code to the finish code. The
change can be either upwards or downwards steps.
When a VID input changes state, the ADP3210 detects the
change but ignores the new code for a minimum of time of
400 ns. This keep out is required to prevent reaction to false
code that can occur by a skew in the VID code while the 7-bit
VID input code is in transition. Additionally, the VID change
triggers a PWRGD masking timer to prevent a PWRGD failure.
Each VID change resets and retriggers the internal PWRGD
masking timer. As listed in Table 4, during any VID transient,
the ADP3210 forces a multiphase PWM mode regardless of
system input signals.
Figure 23. Current Limit Circuit
During start-up when the output voltage is below 200 mV, a
secondary current limit is activated. This is necessary because
the voltage swing on CSCOMP cannot extend below ground.
The secondary current-limit circuit clamps the internal COMP
voltage and sets the internal compensation ramp termination
voltage at 1.5 V level. The clamp actually limits voltage drop
across the low side MOSFETs through the current balance
circuitry.
An inherent per phase current limit protects individual phases
in case one or more phases stop functioning because of a faulty
component. This limit is based on the maximum normal-mode
COMP voltage.
After 9ms in current limit, the ADP3210 will latch off . The
latch-off can be reset by removing and reapplying VCC, or by
recycling the EN pin low and high for a short time.
CHANGING VID ON-THE-FLY
The ADP3210 is designed to track dynamically changing VID
code. As a result, the converter output voltage, that is, the CPU
VCC voltage, can change without the need to reset either the
controller or the CPU. This concept is commonly referred to as
VID on-the-fly (VID OTF) transient. A VID-OTF can occur
either under light load or heavy load conditions. The processor
signals the controller by changing the VID inputs in LSB
OUTPUT CROWBAR
To protect the CPU load and output components of the
converter, the PWM outputs are driven low, DCM and OD are
driven high (that is, commanded to turn on the low-side
MOSFETs of all phases) when the output voltage exceeds an
OVP threshold of 1.55 V as specified by IMVP-6.5.
Turning on the low-side MOSFETs discharges the output
capacitor as soon as reverse current builds up in the inductors.
If the output overvoltage is due to a short of the high-side
MOSFET, then this crowbar action current limits the input
supply or causes the input rail fuse to blow, protecting the
microprocessor from destruction.
Once overvoltage protection (OVP) is triggered, the ADP3210 is
latched off. The latch-off function can be reset by removing and
reapplying VCC, or by recycling EN low and high for a short
time.
REVERSE VOLTAGE PROTECTION
Very large reverse currents in inductors can cause negative
VCORE voltage, which is harmful to the CPU and other output
components. ADP3210 provides reverse voltage protection
(RVP) function without additional system cost. The VCORE
voltage is monitored through the CSREF pin. Any time the
CSREF pin voltage is below −300 mV, the ADP3210 triggers its
RVP function by disabling all PWM outputs and setting both
DCM and OD pins low. Thus, all the MOSFETs are turned off.
The reverse inductor current can be quickly reset to zero by
dumping the energy built up in the inductor into the input dc
voltage source via the forward-biased body diode of the high-
side MOSFETs. The RVP function is terminated when the
CSREF pin voltage returns above −100 mV.
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