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TDA8296 Datasheet, PDF (43/87 Pages) NXP Semiconductors – Digital global standard low IF demodulator for analog TV and FM radio
NXP Semiconductors
TDA8296
Digital global standard low IF demodulator for analog TV and FM radio
Table 42. D_IF_AGC_STAT register (address 27h) bit description
Bit Symbol
Access Value Description
7 to 0 D_IF_AGC_STAT[7:0] R
-
D_IF_AGC_STAT is the digital IF AGC status
readout byte. Contains the digital IF AGC loop
DC information. The format is twos
complement. To get the internal gain in dB, the
following formula can be used:
gain = D-----_---I--F----_---A---G-----C----_---S---T---A----T----+-----5---0-- (dB) .
3.675
Table 43. T_IF_AGC_STAT register (address 28h) bit description
Bit Symbol
Access Value Description
7 to 0 T_IF_AGC_STAT[7:0] R
-
T_IF_AGC_STAT is the IF AGC status readout
byte. Contains the tuner IF AGC loop DC
information. The format is offset binary.
Table 44. ALT_FILT_COEF register (address 2Bh) bit description
Bit Symbol
Access Value Description
7 to 2 not used
R/W 0
not used.
1 to 0 ALT_FILT_COEF
R/W 00
01
10
internal selection of fixed
coefficients for video low
pass filter using an ADC
sampling frequency of
Frequency
54.00 MHz
50.75 MHz
57.25 MHz
Table 45. SSIF_AGC_STAT register (address 2Dh) bit description
Bit Symbol
Access Value Description
7 to 0 SSIF_AGC_STAT[7:0] R
-
SSIF_AGC_STAT contains the SSIF AGC gain
information. To get the internal gain in dB, the
following formula can be used:
gain = 20log S---S---I--F----_---A----G----C----_---S---T---A----T-- . The value is
10
8
approximately the PC / SC ratio.
9.3.14 Chip identification and Standby mode
Table 46. IDENTITY register (address 2Fh) bit description
Bit Symbol
Access Value
Description
7 to 0 IDENTITY[7:0] R
1000 1100* chip identification, value corresponds to TDA8296
Table 47. CLB_STDBY register (address 30h) bit description
Legend: * = default value.
Bit Symbol Access Value Description
7 to 3 -
R/W 0000 0* not used
2
-
R/W 0*
reserved, must be set to logic 0
TDA8296
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 3 March 2011
© NXP B.V. 2011. All rights reserved.
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