TDA8296 Datasheet, PDF (35/87 Pages) NXP Semiconductors – Digital global standard low IF demodulator for analog TV and FM radio

NXP Semiconductors
TDA8296
Digital global standard low IF demodulator for analog TV and FM radio
Table 31. CVBS_LEVEL register (address 1Eh) bit description
Legend: * = default value.
Bit Symbol
Access Value Description
7 to 0 CVBS_LVL[7:0] R/W
With this byte, the nominal video output level is freely
programmable. The format is unsigned integer (offset
binary). Settings below 40h and above C0h, which
correspond to −5 dB (40h) and +4.5 dB (C0h) related to
the default value, are forbidden. In the following some
possible settings in 1 dB steps are shown.
51h
−3 dB nominal
5Bh
−2 dB nominal
66h
−1 dB nominal
73h*
nominal: 1 V (p-p) video output level (sync-peak)
81h
+1 dB nominal
91h
+2 dB nominal
A2h
+3 dB nominal
Table 32. CVBS_EQ register (address 1Fh) bit description
Legend: * = default value.
Bit Symbol
Access Value
Description
7 to 0 CVBS_EQ[7:0] R/W
The video equalizer can be used for the
compensation of a principal tuner tilt or to change
the video frequency according to customer taste.
The figures given are at 5 MHz CVBS with respect
to low frequencies (see Figure 13).
0000 0001
The video frequency response is −8 dB for
5 MHz.
0000 0010
The video frequency response is −6 dB for
5 MHz.
0000 0100
The video frequency response is −4 dB for
5 MHz.
0000 1000
The video frequency response is −2 dB for
5 MHz.
0001 0000* The video frequency response is made flat in this
mode.
0010 0000
The video frequency response is +2 dB (peaking)
for 5 MHz.
0100 0000
The video frequency response is +4 dB (peaking)
for 5 MHz.
1000 0000
The video frequency response is +6 dB (peaking)
for 5 MHz.
TDA8296
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 3 March 2011
© NXP B.V. 2011. All rights reserved.
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