TDA8025 Datasheet, PDF (16/38 Pages) NXP Semiconductors – IC card interface

NXP Semiconductors
TDA8025
IC card interface
4. pins I/O, AUX1 and AUX2 are enabled (t3)
5. CLK is applied to the C3 contact (t4)
6. pin RST is enabled (t5)
Calculation of the time delays is as follows:
• t1 = t0 + 2.13 ms
• t2 = t1 = 3T/2 + 3(¹â„_fosc(int)low)
• t3 = t1 + 5T/2
• t4 = driven by the host controller; > t3 and < t5
• t5 = t1 + 11T/2
Remark: The value of period T is 64 times the period interval of the internal oscillator (i.e.
±25 µs). t3 is called t_d(start) and t5 is called t_d(end). f_osc(int)low is the low (or inactive mode)
frequency of the defined f_osc(int) parameter.
The CLK is applied to the card under control of pin RSTIN in exactly the same way as with
the crystal oscillator.
Remark: Do not perform activation with pin RSTIN permanently pulled HIGH.
CMDVCCN
XTAL1
V_CC
I/O
ATR
CLK
RSTIN
RST
I/OUC
OSCINT
low frequency
t0 t1 = t2 t_d(start)
high frequency
t4 t_d(end) = t_act
001aai967
Fig 10. Activation sequence: CLK controlled by pin RSTIN with an external clock
connected to pin XTAL1
TDA8025_1
Product data sheet
Rev. 01 — 6 April 2009
© NXP B.V. 2009. All rights reserved.
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