TDA8025 Datasheet, PDF (11/38 Pages) NXP Semiconductors – IC card interface

NXP Semiconductors
TDA8025
IC card interface
-^R----¹---ⁿ--^o---^m--
R2_nom
=
(^-(--11^----+^{-–----ββ----))}
⋅


V_{-----D----D---(--I--N---T---F---)--a---c--t--m---i--n}
V _th(max)
–
1_
(9)
R2_nom = _---₁-----₊--^R----_RR--^s----^u--₂₁---^m_---nn-----_oo-----mm------_- = _---₁-----₊-----_(-(----₁₁---------_+-–--------_β-_{β-------))}----_â‹---_---_V-------^R--_D-----^s_---D--^u--_V--₍-^m_---I--_t--_N--_h-----_(T---m--_F------_a-_{)----ax-----)c}----_t----_m-------_i---n----_–-----₁---_--_--
(10)
If we target 1 % accuracy resistors (β = 0.01) and R_sum = 100 kΩ; V_th(max) = 1.33 V (see
Table 8 on page 23) and V_{DD(INTF)actmin} = 2.64 V then
• R1_nom = 50.88 kΩ
• R2_nom = 49.12 kΩ
Deactivation always occurs when
V _PORADJ < V _th(min) ⇒ V _{DD(INTF)deactmax} = ^V----_α-^t-^h--_m-⁽--^m-_a--_xi--ⁿ---⁾
(11)
where
• V_th(min) is the minimum falling external threshold voltage
• V_{DD(INTF)deactmax} is the maximum value of V_DD(INTF) below which deactivation always
occurs
• α_max
α_max = ₁-----₊------_RR--------₂₁------_nn-----_o-o----_m-¹_{m---------⋅â‹}------₍₍-----_{11---------+–}---------_β-β-------_))- = _V-----_D----_D---₍--^V_I--_N--^t-_T-^h--_F⁽--^m-₎--_d-ⁱ-ⁿ-_e--⁾_a---_c--_t--_m---_a---_x
(12)
With the resulting values for R1_nom, R2_nom and β; V_th(min) = 1.17 V (see Table 8 on
page 23) then V_{DD(INTF)deactmax} is 2.28 V.
8.3 Clock circuits
The clock signal (pin CLK) to the card is either generated by the clock signal input on pin
XTAL1 or from a crystal (f_xtal ≤ 26 MHz) connected between pins XTAL1 and XTAL2. The
voltage level applied to pin ENCLKIN defines which clock signal is used. When pin
ENCLKIN is HIGH, connect the external clock to pin XTAL1.
Driving pin ENCLKIN LOW causes the external crystal to generate frequency f_xtal. Using
pins CLKDIV1 and CLKDIV2, the crystal frequency can be set to either f_xtal, ¹â„₂ f_xtal, ¹â„₄ f_xtal
or ¹â„₈ f_xtal.
The frequency change is synchronous and as such during transition, no pulse is shorter
than 45 % of the smallest period. In addition, only the first and last clock pulse around the
change have the correct width. When dynamically changing the frequency, the
modification is only effective after 10 periods of XTAL1.
TDA8025_1
Product data sheet
Rev. 01 — 6 April 2009
© NXP B.V. 2009. All rights reserved.
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