TDA8025 Datasheet, PDF (13/38 Pages) NXP Semiconductors – IC card interface

NXP Semiconductors
TDA8025
IC card interface
8.4 Input and output circuits
When pins I/O and I/OUC are driven HIGH using an 11 kΩ resistor between pins I/O and
V_CC and/or between pins I/OUC and V_DD(INTF), both lines enter the idle state. Pin I/O is
referenced to V_CC and pin I/OUC to V_DD(INTF), thus allowing operation at V_CC ≠ V_DD(INTF).
The first side on which a falling edge occurs becomes the master. An anti-latch circuit
disables falling edge detection on the other line, making it the slave. After a time delay
t_d(edge), the NMOS transistor on the slave-side is turned on. It then sends logic 0 to the
master-side. When the master returns logic 1, the PMOS transistor on the slave side is
turned on during the time delay (t_pu). After this sequence, both the master and slave return
to their idle states.
The active pull-up feature ensures fast LOW-to-HIGH transitions making the TDA8025
capable of delivering more than 1 mA, up to an output voltage of 0.9 V_CC, at a load of
80 pF. At the end of the active pull-up pulse, the output voltage is dependent on the
internal pull-up resistor value and load current. The current sent to and received from the
card’s I/O lines is internally limited to 15 mA at a maximum frequency of 1 MHz.
8
I_OH I/O
(A)
6
4
I_OH I/O
001aai964
4
V I/O
V I/O
(V)
3
2
2
1
0
0
0
20
40
60
80
100
t (ns)
Fig 7. Output voltage and current on pins I/O, AUX1 and AUX2 as a function of time
during LOW-to-HIGH transitions
8.5 Inactive mode
After a power-on reset, the circuit enters the inactive mode, ensuring only the minimum
number of circuits are active while the TDA8025 waits for the microcontroller to start a
session. The inactive mode conditions are as follows:
• all card contacts are inactive. The impedance between the contacts and GND is
approximately 200 Ω.
• pins I/OUC, AUX1UC and AUX2UC are high-impedance using the 11 kΩ pull-up
resistor connected to V_DD(INTF)
• the voltage generators and crystal oscillator are stopped
• the voltage supervisor is active
• the internal oscillator runs in low frequency mode
TDA8025_1
Product data sheet
Rev. 01 — 6 April 2009
© NXP B.V. 2009. All rights reserved.
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