PC87309 Datasheet, PDF (26/192 Pages) National Semiconductor (TI) – PC87309 SuperI/O Plug and Play Compatible Chip in Compact 100-Pin VLJ Packaging

Configuration
TABLE 2-12. Parallel Port Configuration Registers - Logical Device 1
Index R/W
30h R/W
Hard Reset
00h
31h R/W
00h
60h R/W
02h
61h R/W
78h
70h R/W
07h
71h R/W
00h
74h R/W
75h R
F0h R/W
04h
04h
See Section 2.6
Soft Reset
00h
00h
02h
78h
07h
00h
04h
04h
No Effect
Configuration Register or Action
Activate.
See also FER1 of the Power Management device
(Logical Device 4).
I/O Range Check.
Base Address MSB register.
Bits 7-3 (for A15-11) are read only, 00000b.
Base Address LSB register.
Bits 1,0 (for A1,0) are read only, 00b.
See Section 2.2.2 on page 20.
Interrupt Select.
Interrupt Type.
Bit 0 is read only. It reflects the interrupt type
dictated by the Parallel Port operation mode and
configured by the SuperI/O Parallel Port
Configuration register. This bit is set to 1 (level
interrupt) in Extended Mode and cleared (edge
interrupt) in all other modes.
Bit 1 is a read/write bit.
Bits 7-2 are read only.
DMA Channel Select.
Report no DMA assignment.
SuperI/O Parallel Port Configuration register.
TABLE 2-13. UART2 and Infrared Configuration Registers - Logical Device 2
Index R/W
30h R/W
Hard Reset
00h
31h R/W
00h
60h R/W
02h
61h R/W
F8h
70h R/W
03h
71h R/W
03h
74h R/W
75h R/W
F0h R/W
04h
04h
See Section 2.7
Soft Reset
00
00h
02h
F8h
03h
03h
04h
04h
No Effect
Configuration Register or Action
Activate.
See also FER1 of the Power Management device
(Logical Device 4).
I/O Range Check.
Base Address MSB register.
Bits 7-3 (for A15-11) are read only, 00000b.
Base Address LSB register.
Bit 2-0 (for A2-0) are read only, 000b.
Interrupt Select.
Interrupt Type.
Bit 1 is R/W; other bits are read only.
DMA Channel Select 0 (RX_DMA).
DMA Channel Select 1 (TX_DMA).
SuperI/O UART2 Configuration register.
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