PC87309 Datasheet, PDF (132/192 Pages) National Semiconductor (TI) – PC87309 SuperI/O Plug and Play Compatible Chip in Compact 100-Pin VLJ Packaging

Enhanced Serial Port with IR -UART2 (Logical Device 2)
Non-Extended Mode
76543210
Modem Control
0 0 0 0 0 0 0 0 Reset ^{Register (MCR)}
Bank 0,
000
Required
Offset 04h
DTR
RTS
RILP
ISEN or DCDLP
LOOP
Reserved
Reserved
Reserved
Extended Mode
76543210
Modem Control
0 0 0 0 0 0 0 0 Reset ^{Register (MCR)}
Bank 0,
Required
Offset 04h
DTR
RTS
DMA_EN
TX_DFR
IR_PLS
MDSL0
MDSL1
MDSL2
Non-Extended Mode
76543210
Link Status
0 1 1 0 0 0 0 0 Reset
Register (LSR)
Bank 0,
Required
Offset 05h
RXDA
OE
PE
FE
BRK
TXRDY
TXEMP
ER_INF
76543210
Modem Status
X X X X 0 0 0 0 Reset ^{Register (MSR)}
Bank 0,
Required
Offset 06h
DCTS
DDSR
TERI
DDCD
CTS
DSR
RI
DCD
Non-Extended Mode
76543210
Scratch Register
Reset
(SCR)
Bank 0,
Required
Offset 07h
Scratch Data
Extended Mode
76543210
Auxiliary Status
0 0 0 0 0 0 0 0 Reset
Register (ASCR)
Bank 0,
0
Required
Offset 07h
RXF_TOUT
EOF_INF
S_EOT
Reserved
RXWDG
RXACT
TXUR
Reserved
Legacy Baud Generator Divisor
76543210
Low Byte Register
Reset
(LBGD(L)
Bank 1,
Required
Offset 00h
Least Significant Byte
of Baud Generator
Legacy Baud Generator Divisor
76543210
High Byte Register
Reset
(LBGD(H))
Bank 1,
Required
Offset 01h
Most Significant Byte
of Baud Generator
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