UPD70F3218 Datasheet, PDF (570/884 Pages) NEC – 32-Bit Single-Chip Microcontrollers

CHAPTER 19 I²C BUS
19.6.2 Addresses
The 7 bits of data that follow the start condition are defined as an address.
An address is a 7-bit data segment that is output in order to select one of the slave devices that are connected to
the master device via bus lines. Therefore, each slave device connected via the bus lines must have a unique
address.
The slave devices include hardware that detects the start condition and checks whether or not the 7-bit address
data matches the data values stored in the SVAn register. If the address data matches the SVAn values, the slave
device is selected and communicates with the master device until the master device transmits a start condition or stop
condition (n = 0, 1).
Figure 19-7. Address
SCLn
123456789
SDAn
INTIICn
AD6 AD5 AD4 AD3 AD2 AD1 AD0 R/W
Address
Note
Note The interrupt request signal (INTIICn) is generated if a local address or extension code is received
during slave device operation.
Remark n = 0, 1
The slave address and the eighth bit, which specifies the transfer direction as described in 19.6.3 Transfer
direction specification below, are together written to the IICn register and are then output. Received addresses are
written to the IICn register.
The slave address is assigned to the higher 7 bits of the IICn register.
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