UPD70F3218 Datasheet, PDF (231/884 Pages) NEC – 32-Bit Single-Chip Microcontrollers

CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
(9) TMP0 counter read buffer register (TP0CNT)
The TP0CNT register is a read buffer register that can read the count value of the 16-bit counter.
If this register is read when the TP0CTL0.TP0CE bit = 1, the count value of the 16-bit timer can be read.
This register is read-only, in 16-bit units.
The value of the TP0CNT register is cleared to 0000H when the TP0CE bit = 0. If the TP0CNT register is read
at this time, the value of the 16-bit counter (FFFFH) is not read, but 0000H is read.
The value of the TP0CNT register is cleared to 0000H after reset, as the TP0CE bit is cleared to 0.
Caution Accessing the TP0CNT register is disabled during subclock operation with the main clock
stopped. For details, refer to 3.4.8 (2).
After reset: 0000H R Address: FFFFF5AAH
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TP0CNT
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