MC68HC912B32 Datasheet, PDF (82/128 Pages) Motorola, Inc – 16-Bit Microcontroller

DDRT — Data Direction Register for Timer Port
Bit 7
6
5
4
DDT7 DDT6 DDT5 DDT4
RESET:
0
0
0
0
3
DDT3
0
2
DDT2
0
1
DDT1
0
Bit 0
DDT0
0
$00AF
Read or write anytime.
0 = Configures the corresponding I/O pin for input only
1 = Configures the corresponding I/O pin for output
The timer forces the I/O state to be an output for each timer port pin associated with an enabled output
compare. In these cases the data direction bits will not be changed but have no affect on the direction
of these pins. The DDRT will revert to controlling the I/O direction of a pin when the associated timer
output compare is disabled. Input captures do not override the DDRT settings.
12.2 Timer Operation in Modes
STOP: Timer is off since both PCLK and ECLK are stopped.
BDM:
Timer keeps running, unless TSBCK = 1
WAIT:
Counters keep running, unless TSWAI = 1
NORMAL: Timer keeps running, unless TEN = 0
TEN = 0: All timer operations are stopped, registers may be accessed.
Gated pulse accumulator ÷64 clock is also disabled.
PAEN = 0: All pulse accumulator operations are stopped, registers may be accessed.
MOTOROLA
82
MC68HC912B32
MC68HC912B32TS/D