MC68HC912B32 Datasheet, PDF (124/128 Pages) Motorola, Inc – 16-Bit Microcontroller

• Breakpoints are not allowed if the BDM mode is already active. Active mode means the CPU is
executing out of the BDM ROM.
• BDM should not be entered from a breakpoint unless the ENABLE bit is set in the BDM. This is
important because even if the ENABLE bit in the BDM is negated the CPU actually does execute
the BDM ROM code. It checks the ENABLE and returns if not set. If the BDM is not serviced by
the monitor then the breakpoint would be re-asserted when the BDM returns to normal CPU flow.
There is no hardware to enforce restriction of breakpoint operation if the BDM is not enabled.
16.3.2 Registers
Breakpoint operation consists of comparing data in the breakpoint address registers (BRKAH/BRKAL)
to the address bus and comparing data in the breakpoint data registers (BRKDH/BRKDL) to the data
bus. The breakpoint data registers can also be compared to the address bus. The scope of comparison
can be expanded by ignoring the least significant byte of address or data matches.
The scope of comparison can be limited to program data only by setting the BKPM bit in breakpoint con-
trol register 0.
To trace program flow, setting the BKPM bit causes address comparison of program data only. Control
bits are also available that allow checking read/write matches.
BRKCT0 — Breakpoint Control Register 0
$0020
Bit 7
6
5
4
3
2
1
Bit 0
BKEN1 BKEN0 BKPM
0
BK1ALE BK0ALE
0
0
RESET:
0
0
0
0
0
0
0
0
Read and write anytime.
This register is used to control the breakpoint logic.
BKEN1, BKEN0 — Breakpoint Mode Enable
Table 47 Breakpoint Mode Control
BKEN1 BKEN0
Mode Selected
0
0 Breakpoints Off
0
1 SWI — Dual Address Mode
1
0 BDM — Full Breakpoint Mode
1
1 BDM — Dual Address Mode
BRKAH/L Usage BRKDH/L Usage R/W
—
—
—
Address Match Address Match No
Address Match
Data Match
Yes
Address Match Address Match Yes
Range
—
Yes
Yes
Yes
BKPM — Break on Program Addresses
This bit controls whether the breakpoint will cause a break on a match (next instruction boundary) or on
a match that will be an executable opcode. Data and unexecuted opcodes cannot cause a break if this
bit is set. This bit has no meaning in SWI dual address mode. The SWI mode only performs program
breakpoints.
0 = On match, break at the next instruction boundary
1 = On match, break if the match is an instruction that will be executed. This uses tagging as its
breakpoint mechanism.
BK1ALE — Breakpoint 1 Range Control
Only valid in dual address mode.
0 = BRKDL will not be used to compare to the address bus.
1 = BRKDL will be used to compare to the address bus.
BK0ALE — Breakpoint 0 Range Control
Valid in all modes.
0 = BRKAL will not be used to compare to the address bus.
1 = BRKAL will be used to compare to the address bus.
MOTOROLA
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MC68HC912B32
MC68HC912B32TS/D