MC68HC912B32 Datasheet, PDF (76/128 Pages) Motorola, Inc – 16-Bit Microcontroller

TCTL1 — Timer Control Register 1
Bit 7
6
5
4
3
2
1
Bit 0
OM7
OL7
OM6
OL6
OM5
OL5
OM4
OL4
RESET:
0
0
0
0
0
0
0
0
$0088
TCTL2 — Timer Control Register 2
Bit 7
6
5
4
3
2
1
Bit 0
OM3
OL3
OM2
OL2
OM1
OL1
OM0
OL0
RESET:
0
0
0
0
0
0
0
0
$0089
Read or write anytime.
OMn — Output Mode
OLn — Output Level
These eight pairs of control bits are encoded to specify the output action to be taken as a result of a
successful OCn compare. When either OMn or OLn is one, the pin associated with OCn becomes an
output tied to OCn regardless of the state of the associated DDRT bit.
Table 24 Compare Result Output Action
OMn
0
0
1
1
OLn
0
1
0
1
Action
Timer disconnected from output pin logic
Toggle OCn output line
Clear OCn output line to zero
Set OCn output line to one
TCTL3 — Timer Control Register 3
Bit 7
6
5
EDG7B EDG7A EDG6B
RESET:
0
0
0
4
EDG6A
0
3
EDG5B
0
2
EDG5A
0
1
EDG4B
0
Bit 0
EDG4A
0
TCTL4 — Timer Control Register 4
Bit 7
6
5
EDG3B EDG3A EDG2B
RESET:
0
0
0
4
EDG2A
0
3
EDG1B
0
2
EDG1A
0
1
EDG0B
0
Bit 0
EDG0A
0
Read or write anytime.
EDGnB, EDGnA — Input Capture Edge Control
These eight pairs of control bits configure the input capture edge detector circuits.
Table 25 Edge Detector Circuit Configuration
EDGnB
0
0
1
1
EDGnA
0
1
0
1
Configuration
Capture disabled
Capture on rising edges only
Capture on falling edges only
Capture on any edge (rising or falling)
$008A
$008B
MOTOROLA
76
MC68HC912B32
MC68HC912B32TS/D