MC68HC912B32 Datasheet, PDF (103/128 Pages) Motorola, Inc – 16-Bit Microcontroller

BSVR — BDLC State Vector Register
$00F9
Bit 7
6
5
4
3
2
1
Bit 0
0
0
I3
I2
I1
I0
0
0
RESET:
0
0
0
0
0
0
0
0
Decreases the CPU overhead associated with servicing interrupts while operating a serial communica-
tion protocol. It provides an index offset that is directly related to the BDLC’s current state.
I0, I1, I2, I3 — Interrupt Source
Source of the pending interrupt request. Bits are encoded according to Table 35.
Table 35 Interrupt Sources
BSVR
I3
I2
I1
I0
$00
0
0
0
0
$04
0
0
0
1
$08
0
0
1
0
$0C
0
0
1
1
$10
0
1
0
0
$14
0
1
0
1
$18
0
1
1
0
$1C
0
1
1
1
$20
1
0
0
0
Interrupt Source
No Interrupts Pending
Received EOF
Received IFR byte (RXIFR)
Rx data register full (RDRF)
Tx data register empty (TDRE)
Loss of arbitration
CRC error
Symbol invalid or out of range
Wakeup
Priority
0 (lowest)
1
2
3
4
5
6
7
8 (highest)
Bits I0, I1, I2, and I3 are cleared by a read of the BSVR register except when the BDLC data register
needs servicing (RDRF, RXIFR, or TDRE conditions). RXIFR and RDRF can only be cleared by a read
of the BSVR register followed by a read of BDR. TDRE can either be cleared by a read of the BSVR
register followed by a write to the BDLC BDR register, or by setting the TEOD bit in BCR2.
Upon receiving a BDLC interrupt, the user may read the value within the BSVR, transferring it to the
CPU’s index register. The value can be used to index a jump table to access a service routine. For ex-
ample:
SERVICE
LDX
BSVR
Fetch State Vector Number
JMP
JMPTAB,X Enter service routine,
*
(must end in an RTI)
*
JMPTAB
JMP
SERVE0
Service condition #0
NOP
JMP
SERVE1
Service condition #1
NOP
JMP
SERVE2
Service condition #2
NOP
.
.
.
JMP
SERVE8
Service condition #8
END
NOP instructions are used to align the JMP instructions onto 4-byte boundaries so that the value in the
BSVR may be used intact. Each of the service routines must end with an RTI instruction.
MC68HC912B32
MC68HC912B32TS/D
MOTOROLA
103