MC68HC912B32 Datasheet, PDF (64/128 Pages) Motorola, Inc – 16-Bit Microcontroller

CLOCK SOURCE
(PCLK)
GATE
(CLOCK EDGE SYNC)
PWENx
PPOL = 0
PPOL = 1
PWDTY
PWCNTx
CENTR = 1
RESET
(DUTY CYCLE)
8-BIT COMPARE =
PWDTYx
(PERIOD)
8-BIT COMPARE =
PWPERx
FROM PORT P
DATA REGISTER
T
Q
MUX
Q
PPOLx
MUX
TO PIN
DRIVER
(PWPER − PWDTY) × 2
PWPER × 2
PWDTY
Figure 16 Block Diagram of PWM Center-Aligned Output Channel
MOTOROLA
64
MC68HC912B32
MC68HC912B32TS/D