SDA9400 Datasheet, PDF (76/94 Pages) Micronas – Scan Rate Converter using Embedded DRAM Technology Units

SDA 9400
Bit
D7...D4
D3
D2
D1
D0
Name
YBORDER
FLASHON
TWOOUT
FIXSHR
MEDON
Subaddress 17
Function
Y border value (Yborder(3) Yborder(2) Yborder(1) Yborder(0) 0 0 0 0 =
00010000 = 16), YBORDER defines the 4 MSB’s of a 8 bit value
Flash of output picture:
1: on
0: off
Chrominance output format:
1: 2’s complement input (-128...127)
0: unsigned input (0...255)
inside the SDA 9400 the data are always processed as unsigned data
Fixed temporal filtering on:
1: on
0: off
Used filter type for raster interpolation:
1: Median
0: Linear
Bit
D7...D4
D3...D0
Name
UBORDER
VBORDER
Subaddress 18
Function
U border value (Uborder(3) Uborder(2) Uborder(1) Uborder(0) 0 0 0 0 =
10000000 = 128), UBORDER defines the 4 MSB’s of a 8 bit value
V border value (Vborder(3) Vborder(2) Vborder(1) Vborder(0) 0 0 0 0 =
10000000 = 128), VBORDER defines the 4 MSB’s of a 8 bit value
Bit
D7...D4
D3
D2
D1
Micronas
Name
PLL2RA
CLK21EN
CLK11EN
CSMOFF
Subaddress 19
Function
PLL2 range, only for test purposes [PPL2RA=0]
PLL2 input signal (see also Clock concept on page 37):
1: external CLK1
0: external X1/CLK2
Internal clock switch for CLKOUT (see also Clock concept on page 37):
1: PLL2 output
0: external CLK1
Temporal mixing I:
1: off
0: on
76
Preliminary Data Sheet