SDA9400 Datasheet, PDF (68/94 Pages) Micronas – Scan Rate Converter using Embedded DRAM Technology Units

SDA 9400
2F
THFR03
LDR
THFR02
LDR
THFR01
LDR
THFR00
LDR
SVALFI1
LDR
SVALFI0
LDR
SVALFR1
LDR
SVALFR0
LDR
30
THYON
RESMOV
THRMOV4 THRMOV3 THRMOV2 THRMOV1 THRMOV0
LDR
LDR
LDR
LDR
LDR
x
31
SWGM1
SWGM0
THRGM4
LDR
THRGM3
LDR
THRGM2
LDR
THRGM1
LDR
THRGM0
LDR
x
32
NOISME4
LDR
NOISME3
LDR
NOISEME2
LDR
NOISEME1
LDR
NOISEME0
LDR
VERSION2
VERSION1
VERSION0
33
GMOTION
LDR
MOVMO
LDR
MOVPH
LDR
TVMODE
LDR
VISTATUS OSSTATUS MDSTATUS NMSTATUS
FF
x
x
x
x
x
x
x
x
x = don’t care
ISC - Input sync controller block
IFC - Input format conversion block
OSC - Output sync controller block
OFC - Output format conversion block
LDR - Low data rate block
HDR - High data rate block
MC - Memory controller
PLL1 - Clock doubling block 1
PLL2 - Clock doubling block 2
Micronas
68
Preliminary Data Sheet