SDA9400 Datasheet, PDF (73/94 Pages) Micronas – Scan Rate Converter using Embedded DRAM Technology Units

SDA 9400
Bit
D7...D2
D1...D0
Name
APPLOP
CAPP
Subaddress 10
Function
Number of active pixels per line (including coloured border values and
data) in the output data stream in system clocks of X1/CLK2 (length of
HREF):
Active pixels = 16 * APPLOP [APPLOP = 45]
Reduces the active pixels per line (APPL) at the output side:
Active pixels per line at the output side in system clocks of X1/CLK2
= 16 * APPL - 2 * k
k=
24: CAPP = 11
16: CAPP = 10
8: CAPP = 01
0: CAPP = 00
Bit
D7...D0
Name
PPLOP(7...0)
Subaddress 11
Function
Number of pixels between two output H-syncs HOUT (only valid for
HOUTFR=1) in system clocks of X1/CLK2 (Bit 7 to 0):
Number of pixels = 2 * PPLOP [PPLOP = 432]
Bit
D7
D6...D3
D2...D0
Name
PPLOP(8)
STOPMODE
ADOPMODE
Subaddress 12
Function
Number of pixels between two output H-syncs HOUT (only valid for
HOUTFR=1) in system clocks of X1/CLK2 (Bit 8):
Number of pixels = 2 * PPLOP [PPLOP = 432]
Static operation modes (see also Operation mode generator on page
46):
1011: Soft Mix II (interlaced)
Dynamic operation modes (see also Operation mode generator on
page 46):
000: no adaptive operation mode: operation mode defined by STOP-
MODE
Micronas
73
Preliminary Data Sheet