SDA9400 Datasheet, PDF (40/94 Pages) Micronas – Scan Rate Converter using Embedded DRAM Technology Units

SDA 9400
6.5 Output sync controller (OSC)
Input signals
Signals
HEXT
Pin number
60
VEXT
61
Output signals
Signals
HOUT
Pin number
60
VOUT
61
HREF
62
INTERLACED 18
Description
horizontal synchronization signal for
external synchronization (polarity pro-
grammable, I²C bus parameter 14h
HOUTPOL, default: high active,
EXSYN=1)
vertical synchronization signal for exter-
nal synchronization (polarity programma-
ble, I²C bus parameter 14h
VOUTPOL, default: high active,
EXSYN=1)
Description
horizontal synchronization signal (polarity
programmable, I²C bus parameter 14h
HOUTPOL, default: high active,
EXSYN=0)
vertical synchronization signal (polarity
programmable, I²C bus parameter 14h
VOUTPOL, default: high active,
EXSYN=0)
horizontal active video output
interlaced signal (can be used for AC cou-
pled deflection circuits)
The output sync controller generates horizontal and vertical synchronization signals for the scan
rate converted output signal. The figures below show the block diagram of the OSC and the existing
parameters.
Micronas
40
Preliminary Data Sheet