MT40A512M8RH-083E Datasheet, PDF (4/365 Pages) Micron Technology – Programmable data strobe preambles

4Gb: x4, x8, x16 DDR4 SDRAM
Features
Contents
General Notes and Description ....................................................................................................................... 19
Description ................................................................................................................................................ 19
Industrial Temperature ............................................................................................................................... 19
General Notes ............................................................................................................................................ 19
Definitions of the Device-Pin Signal Level ................................................................................................... 20
Definitions of the Bus Signal Level ............................................................................................................... 20
Functional Block Diagrams ............................................................................................................................. 21
Ball Assignments ............................................................................................................................................ 23
Ball Descriptions ............................................................................................................................................ 25
Package Dimensions ....................................................................................................................................... 28
State Diagram ................................................................................................................................................ 32
Functional Description ................................................................................................................................... 34
RESET and Initialization Procedure ................................................................................................................. 35
Power-Up and Initialization Sequence ......................................................................................................... 35
RESET Initialization with Stable Power Sequence ......................................................................................... 38
Uncontrolled Power-Down Sequence .......................................................................................................... 39
Programming Mode Registers ......................................................................................................................... 40
Mode Register 0 .............................................................................................................................................. 43
Burst Length, Type, and Order ..................................................................................................................... 45
CAS Latency ............................................................................................................................................... 46
Test Mode .................................................................................................................................................. 46
Write Recovery(WR)/READ-to-PRECHARGE ............................................................................................... 46
DLL RESET ................................................................................................................................................. 46
Mode Register 1 .............................................................................................................................................. 47
DLL Enable/DLL Disable ............................................................................................................................ 48
Output Driver Impedance Control ............................................................................................................... 49
ODT R_TT(NOM) Values .................................................................................................................................. 49
Additive Latency ......................................................................................................................................... 49
Write Leveling ............................................................................................................................................ 49
Output Disable ........................................................................................................................................... 50
Termination Data Strobe ............................................................................................................................. 50
Mode Register 2 .............................................................................................................................................. 51
CAS WRITE Latency .................................................................................................................................... 53
Low-Power Auto Self Refresh ....................................................................................................................... 53
Dynamic ODT ............................................................................................................................................ 53
Write Cyclic Redundancy Check Data Bus .................................................................................................... 53
Mode Register 3 .............................................................................................................................................. 54
Multipurpose Register ................................................................................................................................ 55
WRITE Command Latency When CRC/DM is Enabled ................................................................................. 56
Fine Granularity Refresh Mode .................................................................................................................... 56
Temperature Sensor Status ......................................................................................................................... 56
Per-DRAM Addressability ........................................................................................................................... 56
Gear-Down Mode ....................................................................................................................................... 56
Mode Register 4 .............................................................................................................................................. 57
Hard Post Package Repair Mode .................................................................................................................. 58
Soft Post Package Repair Mode .................................................................................................................... 58
WRITE Preamble ........................................................................................................................................ 59
READ Preamble .......................................................................................................................................... 59
READ Preamble Training ............................................................................................................................ 59
Temperature-Controlled Refresh ................................................................................................................. 59
09005aef84af6dd0
4gb_ddr4_dram.pdf - Rev. G 1/17 EN
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