MT40A512M8RH-083E Datasheet, PDF (252/365 Pages) Micron Technology – Programmable data strobe preambles

4Gb: x4, x8, x16 DDR4 SDRAM
ODT Mode Register and ODT State Table
Table 71: Termination State Table
Case
A⁴
B⁵
C⁶
D⁶
R_TT(Park)
Disabled
R_TT(NOM)1
Disabled
R_TT(WR)2
Disabled
ODT Pin
Don't Care
ODT READS³ ODT Standby ODT WRITES
Off (High-Z) Off (High-Z) Off (High-Z)
Enabled
Disabled
Enabled
Disabled
Enabled
Enabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Don't Care
Don't Care
Don't Care
Low
High
Low
High
Low
High
Low
High
Off (High-Z)
Off (High-Z)
Off (High-Z)
Off (High-Z)
Off (High-Z)
Off (High-Z)
Off (High-Z)
Off (High-Z)
Off (High-Z)
Off (High-Z)
Off (High-Z)
Off (High-Z)
R_TT(Park)
R_TT(Park)
Off (High-Z)
R_TT(NOM)
Off (High-Z)
R_TT(NOM)
R_TT(Park)
R_TT(NOM)
R_TT(Park)
R_TT(NOM)
R_TT(WR)
R_TT(Park)
R_TT(WR)
Off (High-Z)
R_TT(NOM)
R_TT(WR)
R_TT(WR)
R_TT(Park)
R_TT(NOM)
R_TT(WR)
R_TT(WR)
Notes:
1. If R_TT(NOM) MR is disabled, power to the ODT receiver will be turned off to save power.
2. If R_TT(WR) is enabled, R_TT(WR) will be activated by a WRITE command for a defined period
time independent of the ODT pin and MR setting of R_TT(Park)/R_TT(NOM). This is described in
the Dynamic ODT section.
3. When a READ command is executed, the DRAM termination state will be High-Z for a
defined period independent of the ODT pin and MR setting of R_TT(Park)/R_TT(NOM). This is
described in the ODT During Read section.
4. Case A is generally best for single-rank memories.
5. Case B is generally best for dual-rank, single-slotted memories.
6. Case C and Case D are generally best for multi-slotted memories.
ODT Read Disable State Table
Upon receiving a READ command, the DRAM driving data disables ODT after RL - (2 or
3) clock cycles, where 2 = 1^tCK preamble mode and 3 = 2^tCK preamble mode. ODT stays
off for a duration of BL/2 + (2 or 3) + (0 or 1) clock cycles, where 2 = 1^tCK preamble
mode, 3 = 2^tCK preamble mode, 0 = CRC disabled, and 1 = CRC enabled.
Table 72: Read Termination Disable Window
Preamble
1^tCK
2^tCK
CRC
Disabled
Enabled
Disabled
Enabled
Start ODT Disable After
Read
RL - 2
RL - 2
RL - 3
RL - 3
Duration of ODT Disable
BL/2 + 2
BL/2 + 3
BL/2 + 3
BL/2 + 4
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4gb_ddr4_dram.pdf - Rev. G 1/17 EN
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