PIC24FJ128GA010_09 Datasheet, PDF (95/240 Pages) Microchip Technology – 64/80/100-Pin General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA010 FAMILY
7.3 Control Registers
The operation of the oscillator is controlled by three
Special Function Registers:
• OSCCON
• CLKDIV
• OSCTUN
The OSCCON register (Register 7-1) is the main con-
trol register for the oscillator. It controls clock source
switching, and allows the monitoring of clock sources.
The Clock Divider register (Register 7-2) controls the
features associated with Doze mode, as well as the
postscaler for the FRC oscillator.
The FRC Oscillator Tune register (Register 7-3) allows
the user to fine tune the FRC oscillator over a range of
approximately ±12%. Each bit increment or decrement
changes the factory calibrated frequency of the FRC
oscillator by a fixed amount.
REGISTER 7-1: OSCCON: OSCILLATOR CONTROL REGISTER
U-0
—
bit 15
R-0
R-0
R-0
U-0
COSC2
COSC1
COSC0
—
R/W-x⁽¹⁾
NOSC2
R/W-x⁽¹⁾
NOSC1
R/W-x⁽¹⁾
NOSC0
bit 8
R/SO-0
U-0
CLKLOCK
—
bit 7
R-0⁽²⁾
LOCK
U-0
R/CO-0
—
CF
U-0
R/W-0
R/W-0
—
SOSCEN OSWEN
bit 0
Legend:
R = Readable bit
-n = Value at POR
CO = Clearable-Only bit
W = Writable bit
‘1’ = Bit is set
SO = Settable-Only bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6
Unimplemented: Read as ‘0’
COSC2:COSC0: Current Oscillator Selection bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
Unimplemented: Read as ‘0’
NOSC2:NOSC0: New Oscillator Selection bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
CLKLOCK: Clock Selection Lock Enabled bit
If FSCM is enabled (FCKSM1 = 1):
1 = Clock and PLL selections are locked
0 = Clock and PLL selections are not locked and may be modified by setting the OSWEN bit
If FSCM is disabled (FCKSM1 = 0):
Clock and PLL selections are never locked and may be modified by setting the OSWEN bit.
Unimplemented: Read as ‘0’
Note 1: Reset values for these bits are determined by the FNOSC Configuration bits.
2: Also resets to ‘0’ during any valid clock switch, or whenever a non-PLL Clock mode is selected.
© 2009 Microchip Technology Inc.
DS39747E-page 95