PIC24FJ128GA010_09 Datasheet, PDF (197/240 Pages) Microchip Technology – 64/80/100-Pin General Purpose, 16-Bit Flash Microcontrollers

PIC24FJ128GA010 FAMILY
23.4 JTAG Interface
Note:
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. Refer to Section 33. “Program-
ming and Diagnostics” (DS39716) in the
“PIC24F Family Reference Manual” for
more information.
PIC24FJ128GA010 family devices implement a JTAG
interface, which supports boundary scan device testing
as well as in-circuit programming.
Refer to the Microchip web site (www.microchip.com)
for JTAG support files and additional information.
23.5 Program Verification and
Code Protection
Note:
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. Refer to Section 33. “Program-
ming and Diagnostics” (DS39716) in the
“PIC24F Family Reference Manual” for
more information.
For all devices in the PIC24FJ128GA010 family of
devices, the on-chip program memory space is treated
as a single block. Code protection for this block is con-
trolled by one Configuration bit, GCP. This bit inhibits
external reads and writes to the program memory
space. It has no direct effect in normal execution mode.
Write protection is controlled by the GWRP bit in the
Configuration Word. When GWRP is programmed to 0,
internal write and erase operations to program memory
are blocked.
23.5.1 CONFIGURATION REGISTER
PROTECTION
The Configuration registers are protected against
inadvertent or unwanted changes or reads in two ways.
The primary protection method is the same as that of
the shadow registers which contain a complimentary
value which is constantly compared with the actual
value. To safeguard against unpredictable events, Con-
figuration bit changes resulting from individual cell level
disruptions (such as ESD events) will cause a parity
error and trigger a device Configuration Word Mis-
match Reset.
The data for the Configuration registers is derived from
the Flash Configuration Words in program memory.
When the GCP bit is set, the source data for device
configuration is also protected as a consequence.
23.6 In-Circuit Serial Programming
Note:
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. Refer to Section 33. “Program-
ming and Diagnostics” (DS39716) in the
“PIC24F Family Reference Manual” for
more information.
PIC24FJ128GA010 family microcontrollers can be
serially programmed while in the end application circuit.
This is simply done with two lines for clock (PGCx) and
data (PGDx) and three other lines for power, ground
and the programming voltage. This allows customers to
manufacture boards with unprogrammed devices and
then program the microcontroller just before shipping
the product. This also allows the most recent firmware
or a custom firmware to be programmed.
23.7 In-Circuit Debugger
When MPLAB^® ICD 2 is selected as a debugger, the
In-Circuit Debugging functionality is enabled. This
function allows simple debugging functions when used
with MPLAB IDE. Debugging functionality is controlled
through the EMUCx (Emulation/Debug Clock) and
EMUDx (Emulation/Debug Data) pins.
To use the In-Circuit Debugger function of the device,
the design must implement ICSP connections to
MCLR, VDD, VSS, PGCx, PGDx and the
EMUDx/EMUCx pin pair. In addition, when the feature
is enabled, some of the resources are not available for
general use. These resources include the first 80 bytes
of data RAM and two I/O pins.
© 2009 Microchip Technology Inc.
DS39747E-page 197